利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

20 条记录 (耗时 0.049 秒)

    TEMPERATURE SENSOR AND IMAGE SENSOR HAVING THE SAME
    2.
    发明申请
    TEMPERATURE SENSOR AND IMAGE SENSOR HAVING THE SAME 有权
    温度传感器和具有相同功能的图像传感器

    公开(公告)号：US20120104229A1

    公开(公告)日：2012-05-03

    申请号：US13243471

    申请日：2011-09-23

    申请人： Min-Ho Kwon ,  Sin-Hwan Lim ,  Jin-Ho Seo ,  Ju-Hyun Ko ,  Young-Tae Jang ,  Kyo-Jin Choo

    发明人： Min-Ho Kwon ,  Sin-Hwan Lim ,  Jin-Ho Seo ,  Ju-Hyun Ko ,  Young-Tae Jang ,  Kyo-Jin Choo

    IPC分类号： G01J1/44 ,  H01L27/00 ,  G06F15/00 ,  G01K7/00

    CPC分类号： G01J5/22

    摘要： A temperature sensor includes a band gap reference (BGR) circuit, a voltage generation unit and a digital CDS circuit. The band gap reference (BGR) circuit generates a reference voltage proportional to a temperature. The voltage generation unit generates a first voltage and a second voltage based on the reference voltage, where the first voltage and the second voltage are proportional to the temperature. The digital CDS circuit generates a digital signal corresponding to the temperature by performing a digital correlated double sampling (CDS) operation on the first voltage and the second voltage. The temperature sensor is able to detect a temperature accurately.

    摘要翻译： 温度传感器包括带隙基准（BGR）电路，电压产生单元和数字CDS电路。 带隙基准（BGR）电路产生与温度成比例的参考电压。 电压产生单元基于参考电压产生第一电压和第二电压，其中第一电压和第二电压与温度成比例。 数字CDS电路通过对第一电压和第二电压执行数字相关双采样（CDS）操作来产生对应于温度的数字信号。 温度传感器能够准确检测温度。

    Level shifter utilizing input controlled zero threshold blocking transistors
    5.
    发明授权
    Level shifter utilizing input controlled zero threshold blocking transistors 有权
    电平移位器利用输入控制的零阈值阻塞晶体管

    公开(公告)号：US07053656B2

    公开(公告)日：2006-05-30

    申请号：US10859952

    申请日：2004-06-03

    申请人： Jin-Ho Seo

    发明人： Jin-Ho Seo

    IPC分类号： H03K19/0175 ,  H03K19/094

    CPC分类号： H03K19/09485 ,  H03K19/018528

    摘要： Level shifter circuits include zero threshold transistors that reduce a voltage seen by a switching transistor of the level shifter circuits and may increase blocking of static current in the level shifter circuit. The zero threshold transistors are controlled based on the input to the level shifter circuit. Thin oxide transistors may be used to provide low threshold voltages for the switching transistors. Additional level shifter circuits include serially connected zero threshold transistors that act as switching transistors in a current mirror or latch-type level shifter circuit.

    摘要翻译： 电平移位器电路包括零阈值晶体管，其降低由电平移位器电路的开关晶体管看到的电压，并且可能增加电平移位器电路中的静态电流的阻塞。 基于对电平移位器电路的输入来控制零阈值晶体管。 薄氧化物晶体管可用于为开关晶体管提供低阈值电压。 附加电平移位器电路包括串联连接的零阈值晶体管，其用作电流镜或闩锁型电平移位器电路中的开关晶体管。

    Analog-to-digital converter and image sensor including the same
    6.
    发明授权
    Analog-to-digital converter and image sensor including the same 有权
    模数转换器和图像传感器包括相同的

    公开(公告)号：US08749415B2

    公开(公告)日：2014-06-10

    申请号：US13243246

    申请日：2011-09-23

    申请人： Wun-Ki Jung ,  Jin-Ho Seo ,  Kwi-Sung Yoo ,  Min-Ho Kwon ,  Jae-Hong Kim

    发明人： Wun-Ki Jung ,  Jin-Ho Seo ,  Kwi-Sung Yoo ,  Min-Ho Kwon ,  Jae-Hong Kim

    IPC分类号： H03M3/00

    CPC分类号： H03M3/418 ,  H03M3/43 ,  H03M3/474 ,  H04N5/378

    摘要： An analog-to-digital converter includes a modulation unit and a digital signal generation unit. The modulation unit is disposed corresponding to at least one column line, and sequentially perform delta-sigma modulation on an analog input signal and at least one residue voltage to generate digital bit stream signals. The analog input signal is input through the at least one column line. The at least one residue voltage is generated by performing the delta-sigma modulation on the analog input signal. The digital signal generation unit generates a digital signal corresponding to the analog input signal based on the digital bit stream signals.

    摘要翻译： 模数转换器包括调制单元和数字信号生成单元。 调制单元对应于至少一列列设置，并且对模拟输入信号和至少一个残余电压依次执行Δ-Σ调制以产生数字位流信号。 模拟输入信号通过至少一条列线输入。 通过对模拟输入信号执行Δ-Σ调制来产生至少一个残余电压。 数字信号生成单元基于数字位流信号生成与模拟输入信号对应的数字信号。

    Display device transferring data signal with clock
    7.
    发明授权
    Display device transferring data signal with clock 有权
    显示设备用时钟传输数据信号

    公开(公告)号：US08314763B2

    公开(公告)日：2012-11-20

    申请号：US12167393

    申请日：2008-07-03

    申请人： Jae-Jin Park ,  Dong-Uk Park ,  Jin-Ho Seo

    发明人： Jae-Jin Park ,  Dong-Uk Park ,  Jin-Ho Seo

    IPC分类号： G09G3/36

    CPC分类号： G09G3/2096 ,  G09G3/3685 ,  G09G5/008 ,  G09G2330/06

    摘要： A display device includes; a panel, a timing controller generating an embedded clock data signal combining image data and a clock signal, and a column driver driving the panel in response to the embedded clock data signal. The data bits within the embedded clock data signal are communicated at one of three voltage levels in a three-level signaling scheme, and the timing controller determines one of the three voltage levels for a current data bit (DIN[n]) within the embedded clock data signal in relation to a voltage level of a previous data bit (DIN[n−1]) within the embedded clock data signal.

    摘要翻译： 显示装置包括： 面板，产生组合图像数据和时钟信号的嵌入式时钟数据信号的定时控制器和响应于嵌入的时钟数据信号驱动面板的列驱动器。 嵌入式时钟数据信号中的数据位以三电平信令方案中的三个电压电平中的一个通信，并且定时控制器确定嵌入式时钟数据信号中当前数据位（DIN [n]）的三个电压电平之一 时钟数据信号相对于嵌入式时钟数据信号中的先前数据位（DIN [n-1]）的电压电平。

    ANALOG-TO-DIGITAL CONVERTER AND IMAGE SENSOR INCLUDING THE SAME
    8.
    发明申请
    ANALOG-TO-DIGITAL CONVERTER AND IMAGE SENSOR INCLUDING THE SAME 有权
    模拟数字转换器和图像传感器，包括它们

    公开(公告)号：US20120097839A1

    公开(公告)日：2012-04-26

    申请号：US13243246

    申请日：2011-09-23

    申请人： Wun-Ki JUNG ,  Jin-Ho Seo ,  Kwi-Sung Yoo ,  Min-Ho Kwon ,  Jae-Hong Kim

    发明人： Wun-Ki JUNG ,  Jin-Ho Seo ,  Kwi-Sung Yoo ,  Min-Ho Kwon ,  Jae-Hong Kim

    IPC分类号： H01L27/146 ,  H03M3/02

    CPC分类号： H03M3/418 ,  H03M3/43 ,  H03M3/474 ,  H04N5/378

    摘要： An analog-to-digital converter includes a modulation unit and a digital signal generation unit. The modulation unit is disposed corresponding to at least one column line, and sequentially perform delta-sigma modulation on an analog input signal and at least one residue voltage to generate digital bit stream signals. The analog input signal is input through the at least one column line. The at least one residue voltage is generated by performing the delta-sigma modulation on the analog input signal. The digital signal generation unit generates a digital signal corresponding to the analog input signal based on the digital bit stream signals.

    摘要翻译： 模数转换器包括调制单元和数字信号生成单元。 调制单元对应于至少一列列设置，并且对模拟输入信号和至少一个残余电压依次执行Δ-Σ调制以产生数字位流信号。 模拟输入信号通过至少一条列线输入。 通过对模拟输入信号执行Δ-Σ调制来产生至少一个残余电压。 数字信号生成单元基于数字位流信号生成与模拟输入信号对应的数字信号。

    METHOD FOR PRODUCING ETHANOL FROM XYLOSE USING RECOMBINANT SACCHAROMYCES CEREVISIAE INVOLVING COUPLED USE OF NADH AND NAD+
    9.
    发明申请
    METHOD FOR PRODUCING ETHANOL FROM XYLOSE USING RECOMBINANT SACCHAROMYCES CEREVISIAE INVOLVING COUPLED USE OF NADH AND NAD+ 有权
    使用涉及NADH和NAD +的联合使用的重组细胞因子从XYLOSE生产乙醇的方法

    公开(公告)号：US20110143409A1

    公开(公告)日：2011-06-16

    申请号：US12815837

    申请日：2010-06-15

    申请人： Jin-Ho Seo ,  Yong-Cheol Park

    发明人： Jin-Ho Seo ,  Yong-Cheol Park

    IPC分类号： C12P7/06

    CPC分类号： C12P7/08 ,  C12N9/0006 ,  C12N9/1022 ,  C12N9/1205 ,  Y02E50/17

    摘要： Disclosed is a method for producing ethanol from xylose using recombinant Saccharomyces cerevisiae. In accordance with the method, NADH as a cofactor of xylose reductase required for the ethanol production, and NAD+ as a cofactor of xylitol dehydrogenase are coupled with each other and utilized, and acetaldehyde dehydrogenase mediating production of acetic acid as a byproduct is removed, and ethanol can thus be produced at a high yield and high production efficiency.

    摘要翻译： 公开了使用重组酿酒酵母从木糖生产乙醇的方法。 根据该方法，将作为乙醇生成所需的木糖还原酶的辅因子的NADH和作为木糖醇脱氢酶的辅因子的NAD +彼此偶联使用，并且除去介导乙酸作为副产物的乙醛脱氢酶的除去， 因此可以高产率和高生产效率生产乙醇。

    Digital circuits having current mirrors and reduced leakage current
    10.
    发明申请
    Digital circuits having current mirrors and reduced leakage current 有权
    数字电路具有电流反射镜和漏电流

    公开(公告)号：US20060033530A1

    公开(公告)日：2006-02-16

    申请号：US11204111

    申请日：2005-08-15

    申请人： Jin-Ho Seo

    发明人： Jin-Ho Seo

    IPC分类号： H03K19/0175

    CPC分类号： H03K19/0016

    摘要： A digital circuit such as a level shifter circuit includes a current mirror having first and second current supply transistors configured to provide an output signal to an output node based on an input signal. A leakage current control circuit is configured to maintain the first and second current supply transistors in an off state in response to the output signal. An output compensation circuit coupled to the output node is configured to maintain a voltage level of the output node based on a level of output signal.

    摘要翻译： 诸如电平移位器电路的数字电路包括具有第一和第二电流源晶体管的电流镜，其被配置为基于输入信号向输出节点提供输出信号。 泄漏电流控制电路被配置为响应于输出信号将第一和第二电流供应晶体管保持在断开状态。 耦合到输出节点的输出补偿电路被配置为基于输出信号的电平来维持输出节点的电压电平。