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公开(公告)号：US08866060B2
公开(公告)日：2014-10-21
申请号：US13243471
申请日：2011-09-23
申请人： Min-Ho Kwon , Sin-Hwan Lim , Jin-Ho Seo , Ju-Hyun Ko , Young-Tae Jang , Kyo-Jin Choo
发明人： Min-Ho Kwon , Sin-Hwan Lim , Jin-Ho Seo , Ju-Hyun Ko , Young-Tae Jang , Kyo-Jin Choo
CPC分类号： G01J5/22
摘要： A temperature sensor includes a band gap reference (BGR) circuit, a voltage generation unit and a digital CDS circuit. The band gap reference (BGR) circuit generates a reference voltage proportional to a temperature. The voltage generation unit generates a first voltage and a second voltage based on the reference voltage, where the first voltage and the second voltage are proportional to the temperature. The digital CDS circuit generates a digital signal corresponding to the temperature by performing a digital correlated double sampling (CDS) operation on the first voltage and the second voltage. The temperature sensor is able to detect a temperature accurately.
摘要翻译： 温度传感器包括带隙基准（BGR）电路，电压产生单元和数字CDS电路。 带隙基准（BGR）电路产生与温度成比例的参考电压。 电压产生单元基于参考电压产生第一电压和第二电压，其中第一电压和第二电压与温度成比例。 数字CDS电路通过对第一电压和第二电压执行数字相关双采样（CDS）操作来产生对应于温度的数字信号。 温度传感器能够准确检测温度。
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公开(公告)号：US20120104229A1
公开(公告)日：2012-05-03
申请号：US13243471
申请日：2011-09-23
申请人： Min-Ho Kwon , Sin-Hwan Lim , Jin-Ho Seo , Ju-Hyun Ko , Young-Tae Jang , Kyo-Jin Choo
发明人： Min-Ho Kwon , Sin-Hwan Lim , Jin-Ho Seo , Ju-Hyun Ko , Young-Tae Jang , Kyo-Jin Choo
CPC分类号： G01J5/22
摘要： A temperature sensor includes a band gap reference (BGR) circuit, a voltage generation unit and a digital CDS circuit. The band gap reference (BGR) circuit generates a reference voltage proportional to a temperature. The voltage generation unit generates a first voltage and a second voltage based on the reference voltage, where the first voltage and the second voltage are proportional to the temperature. The digital CDS circuit generates a digital signal corresponding to the temperature by performing a digital correlated double sampling (CDS) operation on the first voltage and the second voltage. The temperature sensor is able to detect a temperature accurately.
摘要翻译： 温度传感器包括带隙基准（BGR）电路，电压产生单元和数字CDS电路。 带隙基准（BGR）电路产生与温度成比例的参考电压。 电压产生单元基于参考电压产生第一电压和第二电压，其中第一电压和第二电压与温度成比例。 数字CDS电路通过对第一电压和第二电压执行数字相关双采样（CDS）操作来产生对应于温度的数字信号。 温度传感器能够准确检测温度。
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公开(公告)号：US08749415B2
公开(公告)日：2014-06-10
申请号：US13243246
申请日：2011-09-23
申请人： Wun-Ki Jung , Jin-Ho Seo , Kwi-Sung Yoo , Min-Ho Kwon , Jae-Hong Kim
发明人： Wun-Ki Jung , Jin-Ho Seo , Kwi-Sung Yoo , Min-Ho Kwon , Jae-Hong Kim
IPC分类号： H03M3/00
摘要： An analog-to-digital converter includes a modulation unit and a digital signal generation unit. The modulation unit is disposed corresponding to at least one column line, and sequentially perform delta-sigma modulation on an analog input signal and at least one residue voltage to generate digital bit stream signals. The analog input signal is input through the at least one column line. The at least one residue voltage is generated by performing the delta-sigma modulation on the analog input signal. The digital signal generation unit generates a digital signal corresponding to the analog input signal based on the digital bit stream signals.
摘要翻译： 模数转换器包括调制单元和数字信号生成单元。 调制单元对应于至少一列列设置，并且对模拟输入信号和至少一个残余电压依次执行Δ-Σ调制以产生数字位流信号。 模拟输入信号通过至少一条列线输入。 通过对模拟输入信号执行Δ-Σ调制来产生至少一个残余电压。 数字信号生成单元基于数字位流信号生成与模拟输入信号对应的数字信号。
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公开(公告)号：US20120097839A1
公开(公告)日：2012-04-26
申请号：US13243246
申请日：2011-09-23
申请人： Wun-Ki JUNG , Jin-Ho Seo , Kwi-Sung Yoo , Min-Ho Kwon , Jae-Hong Kim
发明人： Wun-Ki JUNG , Jin-Ho Seo , Kwi-Sung Yoo , Min-Ho Kwon , Jae-Hong Kim
IPC分类号： H01L27/146 , H03M3/02
摘要： An analog-to-digital converter includes a modulation unit and a digital signal generation unit. The modulation unit is disposed corresponding to at least one column line, and sequentially perform delta-sigma modulation on an analog input signal and at least one residue voltage to generate digital bit stream signals. The analog input signal is input through the at least one column line. The at least one residue voltage is generated by performing the delta-sigma modulation on the analog input signal. The digital signal generation unit generates a digital signal corresponding to the analog input signal based on the digital bit stream signals.
摘要翻译： 模数转换器包括调制单元和数字信号生成单元。 调制单元对应于至少一列列设置，并且对模拟输入信号和至少一个残余电压依次执行Δ-Σ调制以产生数字位流信号。 模拟输入信号通过至少一条列线输入。 通过对模拟输入信号执行Δ-Σ调制来产生至少一个残余电压。 数字信号生成单元基于数字位流信号生成与模拟输入信号对应的数字信号。
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公开(公告)号：US20120098990A1
公开(公告)日：2012-04-26
申请号：US13240670
申请日：2011-09-22
申请人： Wun-Ki JUNG , Seung-Hyun Lim , Dong-Hun Lee , Kwi-Sung Yoo , Min-Ho Kwon , Chi-Ho Hwang
发明人： Wun-Ki JUNG , Seung-Hyun Lim , Dong-Hun Lee , Kwi-Sung Yoo , Min-Ho Kwon , Chi-Ho Hwang
CPC分类号： H04N5/378 , H03M1/162 , H03M1/56 , H04N5/3575 , H04N5/374
摘要： An analog-to-digital converter includes a comparison signal generation unit and a control unit. The comparison signal generation unit determines a logic level of a comparison signal by comparing an input signal with a selected reference signal based on a switch control signal in a first comparison mode, and by comparing a difference voltage with a ramp signal based on the switch control signal in a second comparison mode. The difference voltage is generated based on the input signal and the selected reference signal such that a level of the difference voltage is lower than a fine voltage level corresponding to a voltage level of the selected reference signal in the second comparison mode. The control unit generates the switch control signal based on the comparison signal and a mode selection signal.
摘要翻译： 模数转换器包括比较信号生成单元和控制单元。 比较信号生成单元通过在第一比较模式中基于开关控制信号比较输入信号与所选择的参考信号，并且通过基于开关控制将差分电压与斜坡信号进行比较来确定比较信号的逻辑电平 信号在第二比较模式。 基于输入信号和所选择的参考信号产生差分电压，使得差分电压的电平低于与第二比较模式中所选参考信号的电压电平相对应的精细电压电平。 控制单元基于比较信号和模式选择信号产生开关控制信号。
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公开(公告)号：US20120133800A1
公开(公告)日：2012-05-31
申请号：US13272723
申请日：2011-10-13
申请人： Wun-Ki Jung , Kwi-Sung Yoo , Min-Ho Kwon , Jae-Hong Kim , Seung-Hyun Lim , Yu-Jin Park
发明人： Wun-Ki Jung , Kwi-Sung Yoo , Min-Ho Kwon , Jae-Hong Kim , Seung-Hyun Lim , Yu-Jin Park
CPC分类号： H04N5/363 , H04N5/3575 , H04N5/378
摘要： An offset canceling circuit stores charge corresponding to a voltage difference between a reset voltage received from a unit pixel and a reference voltage, thereby canceling an offset of the unit pixel.
摘要翻译： 偏移消除电路存储对应于从单位像素接收的复位电压与参考电压之间的电压差的电荷，从而消除单位像素的偏移。
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公开(公告)号：US08659339B2
公开(公告)日：2014-02-25
申请号：US13272723
申请日：2011-10-13
申请人： Wun-Ki Jung , Kwi-Sung Yoo , Min-Ho Kwon , Jae-Hong Kim , Seung-Hyun Lim , Yu-Jin Park
发明人： Wun-Ki Jung , Kwi-Sung Yoo , Min-Ho Kwon , Jae-Hong Kim , Seung-Hyun Lim , Yu-Jin Park
IPC分类号： H03L5/00
CPC分类号： H04N5/363 , H04N5/3575 , H04N5/378
摘要： An offset canceling circuit stores charge corresponding to a voltage difference between a reset voltage received from a unit pixel and a reference voltage, thereby canceling an offset of the unit pixel.
摘要翻译： 偏移消除电路存储对应于从单位像素接收的复位电压与参考电压之间的电压差的电荷，从而消除单位像素的偏移。
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公开(公告)号：US08593319B2
公开(公告)日：2013-11-26
申请号：US13611451
申请日：2012-09-12
申请人： Min-Ho Kwon , Seog-Heon Ham , Jeong-Jin Roh , Jae-Jin Yeo , Yong-Suk Choi , Gun-Hee Han
发明人： Min-Ho Kwon , Seog-Heon Ham , Jeong-Jin Roh , Jae-Jin Yeo , Yong-Suk Choi , Gun-Hee Han
IPC分类号： H03M3/00
摘要： An image sensor includes a delta-sigma analog-to-digital converter (ADC) including a delta-sigma modulator (DSM) and a voltage adjusting circuit. The DSM is configured to perform delta-sigma modulation on an analog signal from a unit pixel. The delta-sigma ADC is configured to convert the analog signal to a digital signal. The voltage adjusting circuit includes a replica inverter having a same configuration as at least one inverter included in the DSM. The voltage adjusting circuit is configured to adjust a power supply voltage and an input voltage provided to the at least one inverter based on a current flowing in the replica inverter.
摘要翻译： 图像传感器包括包括Δ-Σ调制器（DSM）和电压调节电路的Δ-Σ模数转换器（ADC）。 DSM被配置为对来自单位像素的模拟信号执行Δ-Σ调制。 Δ-ΣADC配置为将模拟信号转换为数字信号。 电压调整电路包括具有与DSM中包括的至少一个反相器相同配置的复制反相器。 电压调整电路被配置为基于在复制逆变器中流动的电流来调整提供给至少一个逆变器的电源电压和输入电压。
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9.发明授权Analog-to-digital converter having a comparison signal generation unit and image sensor including the same 有权具有比较信号生成单元和包含该比较信号生成单元的图像传感器的模数转换器公开(公告)号：US08547461B2
公开(公告)日：2013-10-01
申请号：US13240670
申请日：2011-09-22
申请人： Wun-Ki Jung , Seung-Hyun Lim , Dong-Hun Lee , Kwi-Sung Yoo , Min-Ho Kwon , Chi-Ho Hwang
发明人： Wun-Ki Jung , Seung-Hyun Lim , Dong-Hun Lee , Kwi-Sung Yoo , Min-Ho Kwon , Chi-Ho Hwang
CPC分类号： H04N5/378 , H03M1/162 , H03M1/56 , H04N5/3575 , H04N5/374
摘要： An analog-to-digital converter includes a comparison signal generation unit and a control unit. The comparison signal generation unit determines a logic level of a comparison signal by comparing an input signal with a selected reference signal based on a switch control signal in a first comparison mode, and by comparing a difference voltage with a ramp signal based on the switch control signal in a second comparison mode. The difference voltage is generated based on the input signal and the selected reference signal such that a level of the difference voltage is lower than a fine voltage level corresponding to a voltage level of the selected reference signal in the second comparison mode. The control unit generates the switch control signal based on the comparison signal and a mode selection signal.
摘要翻译： 模数转换器包括比较信号生成单元和控制单元。 比较信号生成单元通过在第一比较模式中基于开关控制信号比较输入信号与所选择的参考信号，并且通过基于开关控制将差分电压与斜坡信号进行比较来确定比较信号的逻辑电平 信号在第二比较模式。 基于输入信号和所选择的参考信号产生差分电压，使得差分电压的电平低于与第二比较模式中所选参考信号的电压电平相对应的精细电压电平。 控制单元基于比较信号和模式选择信号产生开关控制信号。
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公开(公告)号：US07145491B2
公开(公告)日：2006-12-05
申请号：US10522373
申请日：2002-08-29
申请人： Gun-Hee Han , Min-Ho Kwon , Jung-Yoon Lee
发明人： Gun-Hee Han , Min-Ho Kwon , Jung-Yoon Lee
IPC分类号： H03M1/00
摘要： A time-interleaved bandpass delta-sigma modulator is developed which includes a first adder and a second adder and a comparator. An input signal is transmitted to the first adder according to the clock frequency of each channel block, and an n channel block output un of the first adder is transmitted to the first adder and the second adder of an n+2 channel block, and an n block output vn of the second adder is transmitted to the second adder of an n+2 block, and an output yn that passes through an n block comparator is transmitted to the first adder and the second adder of an n+2 block. Therefore, a modulator sequentially receives output from the comparator of each block for generating the final output y.
摘要翻译： 开发了一种时间交织的带通Δ-Σ调制器，其包括第一加法器和第二加法器以及比较器。 根据每个通道块的时钟频率将输入信号发送到第一加法器，并且第一加法器的n个通道块输出u N n被发送到第一加法器，第二加法器 n + 2个通道块和第n个加法器的n个块输出端子n n n被发送到n + 2个块的第二加法器，并且输出y n n 通过n块比较器被传送到第n + 2块的第一加法器和第二加法器。 因此，调制器顺序地从每个块的比较器接收用于产生最终输出y的输出。
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