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52 条记录 (耗时 0.089 秒)

    Configurable 2-wire/3-wire serial communications interface
    4.
    发明授权
    Configurable 2-wire/3-wire serial communications interface 有权
    可配置2线/ 3线串行通信接口

    公开(公告)号：US08983410B2

    公开(公告)日：2015-03-17

    申请号：US13289302

    申请日：2011-11-04

    申请人： William David Southcombe ,  Christopher Truong Ngo ,  David E. Jones ,  Chris Levesque ,  Scott Yoder ,  Terry J. Stockert

    发明人： William David Southcombe ,  Christopher Truong Ngo ,  David E. Jones ,  Chris Levesque ,  Scott Yoder ,  Terry J. Stockert

    IPC分类号： H01Q11/12 ,  H04B1/04 ,  G06F13/42

    CPC分类号： G06F13/42 ,  G06F13/4291 ,  Y02D10/14 ,  Y02D10/151

    摘要： A configurable 2-wire/3-wire serial communications interface (C23SCI), which includes start-of-sequence (SOS) detection circuitry and sequence processing circuitry, is disclosed. When the SOS detection circuitry is coupled to a 2-wire serial communications bus, the SOS detection circuitry detects an SOS of a received sequence based on a serial data signal and a serial clock signal. When the SOS detection circuitry is coupled to a 3-wire serial communications bus, the SOS detection circuitry detects the SOS of the received sequence based on a chip select (CS) signal. In response to detecting the SOS, the SOS detection circuitry provides an SOS detection signal to the sequence processing circuitry, which initiates processing of the received sequence using the serial data signal and the serial clock signal. The received sequence is associated with one of multiple serial communications protocols.

    摘要翻译： 公开了一种可配置的2线/ 3线串行通信接口（C23SCI），其包括序列启动（SOS）检测电路和序列处理电路。 当SOS检测电路耦合到2线串行通信总线时，SOS检测电路基于串行数据信号和串行时钟信号检测接收序列的SOS。 当SOS检测电路耦合到3线串行通信总线时，SOS检测电路基于芯片选择（CS）信号检测接收到的序列的SOS。 响应于检测到SOS，SOS检测电路向序列处理电路提供SOS检测信号，其使用串行数据信号和串行时钟信号来启动接收到的序列的处理。 所接收的序列与多个串行通信协议之一相关联。

    SPLIT CURRENT CURRENT DIGITAL-TO-ANALOG CONVERTER (IDAC) FOR DYNAMIC DEVICE SWITCHING (DDS) OF AN RF PA STAGE
    7.
    发明申请
    SPLIT CURRENT CURRENT DIGITAL-TO-ANALOG CONVERTER (IDAC) FOR DYNAMIC DEVICE SWITCHING (DDS) OF AN RF PA STAGE 有权
    用于RF PA阶段的动态设备切换（DDS）的分流电流数字到模拟转换器（IDAC）

    公开(公告)号：US20120056679A1

    公开(公告)日：2012-03-08

    申请号：US13289379

    申请日：2011-11-04

    申请人： David E. Jones ,  William David Southcombe ,  Chris Levesque ,  Scott Yoder ,  Terry J. Stockert

    发明人： David E. Jones ,  William David Southcombe ,  Chris Levesque ,  Scott Yoder ,  Terry J. Stockert

    IPC分类号： H03F3/04

    CPC分类号： H03F1/0227 ,  H03F1/0277 ,  H03F3/195 ,  H03F3/211 ,  H03F3/245 ,  H03F2200/18 ,  H03F2200/336 ,  H04B2001/0416

    摘要： A split current current digital-to-analog converter (IDAC) and a radio frequency (RF) power amplifier (PA) stage are disclosed. The split current IDAC operates in a selected one of a group of DDS operating modes and provides a group of array bias signals based on the selected one of the group of DDS operating modes. Each of the group of array bias signals is a current signal. The RF PA stage includes a group of arrays of amplifying transistor elements. The RF PA stage biases at least one of the group of arrays of amplifying transistor elements based on the group of array bias signals. Further, the RF PA stage receives and amplifies an RF stage input signal to provide an RF stage output signal using at least one of the group of arrays of amplifying transistor elements that is biased.

    摘要翻译： 公开了分流电流数模转换器（IDAC）和射频（RF）功率放大器（PA）级。 分流电流IDAC以一组DDS操作模式中的所选择的一个操作，并且基于所选择的一组DDS操作模式提供一组阵列偏置信号。 阵列偏置信号组中的每一个是电流信号。 RF PA级包括一组放大晶体管元件阵列。 RF PA级基于阵列偏置信号组来偏置放大晶体管元件的一组阵列中的至少一个。 此外，RF PA级接收并放大RF级输入信号，以使用被偏置的放大晶体管元件的阵列组中的至少一个来提供RF级输出信号。

    LOOK-UP TABLE BASED CONFIGURATION OF A DC-DC CONVERTER
    8.
    发明申请
    LOOK-UP TABLE BASED CONFIGURATION OF A DC-DC CONVERTER 有权
    DC-DC转换器的基于表的配置

    公开(公告)号：US20120043956A1

    公开(公告)日：2012-02-23

    申请号：US13287672

    申请日：2011-11-02

    申请人： William David Southcombe ,  Chris Levesque ,  Jean-Christophe Berchtold ,  David E. Jones ,  Scott Yoder ,  Terry J. Stockert

    发明人： William David Southcombe ,  Chris Levesque ,  Jean-Christophe Berchtold ,  David E. Jones ,  Scott Yoder ,  Terry J. Stockert

    IPC分类号： G05F5/00

    CPC分类号： H02M3/157

    摘要： RF PA circuitry and a DC-DC converter, which includes an RF PA envelope power supply and DC-DC control circuitry, are disclosed. The PA envelope power supply provides an envelope power supply signal to the RF PA circuitry. The DC-DC control circuitry has a DC-DC look-up table (LUT) structure, which has at least a first DC-DC LUT. The DC-DC control circuitry uses DC-DC LUT index information as an index to the DC-DC LUT structure to obtain DC-DC converter operational control parameters. The DC-DC control circuitry then configures the PA envelope power supply using the DC-DC converter operational control parameters. Using the DC-DC LUT structure provides flexibility in configuring the DC-DC converter for different applications, for multiple static operating conditions, for multiple dynamic operating conditions, or any combination thereof.

    摘要翻译： 公开了RF PA电路和DC-DC转换器，其包括RF PA包络电源和DC-DC控制电路。 PA封装电源为RF PA电路提供信号电源信号。 DC-DC控制电路具有至少具有第一DC-DC LUT的DC-DC查找表（LUT）结构。 DC-DC控制电路使用DC-DC LUT索引信息作为DC-DC LUT结构的索引，以获得DC-DC转换器的操作控制参数。 DC-DC控制电路然后使用DC-DC转换器的操作控制参数配置PA封装电源。 使用DC-DC LUT结构为多种静态工作条件，多种动态工作条件或其任何组合提供了灵活的配置，适用于不同应用的DC-DC转换器。

    Selectable PA bias temperature compensation circuitry
    9.
    发明授权
    Selectable PA bias temperature compensation circuitry 有权
    可选PA偏置温度补偿电路

    公开(公告)号：US08983407B2

    公开(公告)日：2015-03-17

    申请号：US13288318

    申请日：2011-11-03

    申请人： William David Southcombe ,  David E. Jones ,  Hui Liu ,  Chris Levesque ,  Scott Yoder ,  Terry J. Stockert

    发明人： William David Southcombe ,  David E. Jones ,  Hui Liu ,  Chris Levesque ,  Scott Yoder ,  Terry J. Stockert

    IPC分类号： H04B1/04 ,  H01Q11/12 ,  H03F3/19 ,  H03F3/217 ,  H03F3/24 ,  H03F1/30 ,  H03F3/72

    CPC分类号： H03F1/30 ,  H03F3/19 ,  H03F3/2175 ,  H03F3/245 ,  H03F3/72 ,  H03F2200/111 ,  H03F2200/447 ,  H03F2203/7209

    摘要： Radio frequency (RF) power amplifier (PA) circuitry, which transmits RF signals is disclosed. The RF PA circuitry includes a final stage, a final stage current digital-to-analog converter (IDAC), and a final stage temperature compensation circuit. A final stage current reference circuit may provide an uncompensated final stage reference current to the final stage temperature compensation circuit, which receives and temperature compensates the uncompensated final stage reference current to provide a final stage reference current. The final stage IDAC uses the final stage reference current in a digital-to-analog conversion to provide a final stage bias signal to bias the final stage. The temperature compensation provided by the final stage temperature compensation circuit is selectable.

    摘要翻译： 公开了发射RF信号的射频（RF）功率放大器（PA）电路。 RF PA电路包括最后级，最后一级电流数模转换器（IDAC）和最终级温度补偿电路。 最终级电流参考电路可以向最终级温度补偿电路提供未补偿的最终级参考电流，其接收和温度补偿未补偿的最终级参考电流以提供最终级参考电流。 最终阶段IDAC在数模转换中使用最后阶段参考电流，以提供最终阶段偏置信号来偏向最后阶段。 由最终级温度补偿电路提供的温度补偿是可选择的。