CMOS image sensor switch circuit for reduced charge injection
    1.
    发明授权
    CMOS image sensor switch circuit for reduced charge injection 有权
    CMOS图像传感器开关电路用于减少电荷注入

    公开(公告)号:US08816264B2

    公开(公告)日:2014-08-26

    申请号:US13563181

    申请日:2012-07-31

    IPC分类号: H03K17/56

    摘要: A switch circuit including structures to reduce the effects of charge injection. In an embodiment, a first transistor of the switch circuit is to receive a first signal and first and second dummy transistors of the switch circuit are each to receive a second signal, wherein the first transistor is connected between the first and second dummy transistors. The second signal is complementary to the first signal. In another embodiment, the first transistor, the first dummy transistor and the second dummy transistors are each connected via respective body connections to a first low supply voltage.

    摘要翻译: 一种包括减少电荷注入效应的结构的开关电路。 在一个实施例中,开关电路的第一晶体管是接收第一信号,开关电路的第一和第二虚拟晶体管各自接收第二信号,其中第一晶体管连接在第一和第二虚拟晶体管之间。 第二信号与第一信号互补。 在另一个实施例中,第一晶体管,第一虚拟晶体管和第二虚拟晶体管各自经由相应的主体连接连接到第一低电源电压。

    COMPARATOR CIRCUIT FOR REDUCED OUTPUT VARIATION
    2.
    发明申请
    COMPARATOR CIRCUIT FOR REDUCED OUTPUT VARIATION 有权
    用于减少输出变化的比较器电路

    公开(公告)号:US20140061433A1

    公开(公告)日:2014-03-06

    申请号:US13604554

    申请日:2012-09-05

    IPC分类号: H03K5/153 H01L27/146

    CPC分类号: H03K5/249

    摘要: A comparator circuit for generating a signal representing a comparison of an input signal and a reference signal. In an embodiment, the comparator circuit includes a first stage and a second stage to provide respective signal amplification, where switch circuitry of the second stage switchedly couples respective elements of the first and second stages. The comparator circuit further includes a third stage to generate an output signal based on an intermediate signal of the second stage. In another embodiment, feedback circuitry of the comparator circuit is to selectively control a voltage of the output stage based on the output signal.

    摘要翻译: 一种用于产生表示输入信号和参考信号的比较的信号的比较器电路。 在一个实施例中,比较器电路包括第一级和第二级以提供相应的信号放大,其中第二级的开关电路切换耦合第一级和第二级的各个元件。 比较器电路还包括第三级,用于基于第二级的中间信号产生输出信号。 在另一个实施例中,比较器电路的反馈电路是基于输出信号选择性地控制输出级的电压。

    CMOS IMAGE SENSOR SWITCH CIRCUIT FOR REDUCED CHARGE INJECTION
    3.
    发明申请
    CMOS IMAGE SENSOR SWITCH CIRCUIT FOR REDUCED CHARGE INJECTION 有权
    用于降低充电注入的CMOS图像传感器开关电路

    公开(公告)号:US20140034808A1

    公开(公告)日:2014-02-06

    申请号:US13563181

    申请日:2012-07-31

    IPC分类号: H03K17/56 H01L27/146

    摘要: A switch circuit including structures to reduce the effects of charge injection. In an embodiment, a first transistor of the switch circuit is to receive a first signal and first and second dummy transistors of the switch circuit are each to receive a second signal, wherein the first transistor is connected between the first and second dummy transistors. The second signal is complementary to the first signal. In another embodiment, the first transistor, the first dummy transistor and the second dummy transistors are each connected via respective body connections to a first low supply voltage.

    摘要翻译: 一种包括减少电荷注入效应的结构的开关电路。 在一个实施例中,开关电路的第一晶体管是接收第一信号,开关电路的第一和第二虚拟晶体管各自接收第二信号,其中第一晶体管连接在第一和第二虚拟晶体管之间。 第二信号与第一信号互补。 在另一个实施例中,第一晶体管,第一虚拟晶体管和第二虚拟晶体管各自经由相应的主体连接连接到第一低电源电压。

    Comparator circuit for reduced output variation
    4.
    发明授权
    Comparator circuit for reduced output variation 有权
    用于减小输出变化的比较器电路

    公开(公告)号:US08748798B2

    公开(公告)日:2014-06-10

    申请号:US13604554

    申请日:2012-09-05

    IPC分类号: H01J40/14

    CPC分类号: H03K5/249

    摘要: A comparator circuit for generating a signal representing a comparison of an input signal and a reference signal. In an embodiment, the comparator circuit includes a first stage and a second stage to provide respective signal amplification, where switch circuitry of the second stage switchedly couples respective elements of the first and second stages. The comparator circuit further includes a third stage to generate an output signal based on an intermediate signal of the second stage. In another embodiment, feedback circuitry of the comparator circuit is to selectively control a voltage of the output stage based on the output signal.

    摘要翻译: 一种用于产生表示输入信号和参考信号的比较的信号的比较器电路。 在一个实施例中,比较器电路包括第一级和第二级以提供相应的信号放大,其中第二级的开关电路切换耦合第一级和第二级的各个元件。 比较器电路还包括第三级,用于基于第二级的中间信号产生输出信号。 在另一个实施例中,比较器电路的反馈电路是基于输出信号选择性地控制输出级的电压。

    COMPACT ROW DECODER WITH MULTIPLE VOLTAGE SUPPORT
    5.
    发明申请
    COMPACT ROW DECODER WITH MULTIPLE VOLTAGE SUPPORT 有权
    具有多种电压支持的紧凑型解码器

    公开(公告)号:US20150189197A1

    公开(公告)日:2015-07-02

    申请号:US14538772

    申请日:2014-11-11

    申请人: Li Guo Guangbin Zhang

    发明人: Li Guo Guangbin Zhang

    IPC分类号: H04N5/345 H04N5/374

    CPC分类号: H04N5/376 G11C8/10 H04N3/1512

    摘要: The present invention provides a compact row decoder with multiple voltage support. The row decoder may include a global driver and a plurality of row-level drivers. The global driver may include one or more voltage level shifters that are operable to provide multiple voltages required to drive each of the plurality of row-level drivers. The plurality of row-level drivers each may include only one voltage level shifter. In an example, the row-level driver includes an address decoder implemented in a digital domain providing an address selection signal, a voltage level shifter to convert the address selection signal to an analog domain, and a tow driver receiving driving signals from the global driver. The row driver has no voltage level shifter contained therein. Thus, the row-level drivers and the row decoder may be very compact. The present invention further provides a CMOS image sensor including the row decoder and a method of operating the CMOS image sensor.

    摘要翻译: 本发明提供具有多个电压支持的紧凑行解码器。 行解码器可以包括全局驱动器和多个行级驱动器。 全局驱动器可以包括一个或多个电压电平移位器,其可操作以提供驱动多个行级驱动器中的每一个所需的多个电压。 多个行级驱动器各自可以仅包括一个电压电平移位器。 在一个示例中,行级驱动器包括实现在提供地址选择信号的数字域中的地址解码器,将地址选择信号转换为模拟域的电压电平移位器,以及从全局驱动器接收驱动信号的拖曳驱动器 。 行驱动器中没有电压电平转换器。 因此,行级驱动器和行解码器可以非常紧凑。 本发明还提供一种包括行解码器的CMOS图像传感器和操作CMOS图像传感器的方法。

    Shutter release using secondary camera
    6.
    发明授权
    Shutter release using secondary camera 有权
    快门释放使用二次相机

    公开(公告)号:US08957973B2

    公开(公告)日:2015-02-17

    申请号:US13493263

    申请日:2012-06-11

    IPC分类号: H04N5/228

    摘要: A method of capturing an image includes activating a first image sensor and capturing a sequence of images with a second image sensor. A determination is made as to whether the sequence of images captured by the second image sensor includes a shutter gesture. If a shutter gesture is included in the sequence of images captured by the second image sensor, the first image sensor captures a target image in response.

    摘要翻译: 拍摄图像的方法包括激活第一图像传感器并利用第二图像传感器捕获图像序列。 确定由第二图像传感器捕获的图像序列是否包括快门手势。 如果由第二图像传感器捕获的图像序列中包括快门手势,则第一图像传感器响应地捕获目标图像。

    Noise-matching dynamic bias for column ramp comparators in a CMOS image sensor
    7.
    发明授权
    Noise-matching dynamic bias for column ramp comparators in a CMOS image sensor 有权
    CMOS图像传感器中的列斜率比较器的噪声匹配动态偏置

    公开(公告)号:US08872088B2

    公开(公告)日:2014-10-28

    申请号:US13585492

    申请日:2012-08-14

    IPC分类号: H01L27/00 H01L27/146 H03F3/08

    摘要: Embodiments of an image sensor including a pixel array with a plurality of pixels arranged into rows and columns. Control circuitry coupled to the pixels in each row, and an analog-to-digital converter is coupled to the pixels in each column of the pixel array. Each analog-to-digital converter includes a ramp comparator, and a variable current source coupled to the ramp comparator to provide a variable bias current to the ramp comparator. The bias current can adjusted during reading of a row of pixels according to a dynamic bias current profile that maintains at least a specified margin between the random noise of the pixels and an acceptable noise level. Other embodiments are disclosed and claimed.

    摘要翻译: 包括具有排列成行和列的多个像素的像素阵列的图像传感器的实施例。 耦合到每行中的像素的控制电路和模数转换器耦合到像素阵列的每列中的像素。 每个模数转换器包括斜坡比较器和耦合到斜坡比较器的可变电流源,以向斜坡比较器提供可变偏置电流。 根据在像素的随机噪声和可接受的噪声水平之间保持至少指定的余量的动态偏置电流分布,可以在读取一行像素期间调整偏置电流。 公开和要求保护其他实施例。

    IMAGE SENSOR WITH PIPELINED COLUMN ANALOG-TO-DIGITAL CONVERTERS
    8.
    发明申请
    IMAGE SENSOR WITH PIPELINED COLUMN ANALOG-TO-DIGITAL CONVERTERS 有权
    图像传感器与管道柱模数转换器

    公开(公告)号:US20120113306A1

    公开(公告)日:2012-05-10

    申请号:US13080031

    申请日:2011-04-05

    IPC分类号: H04N3/14 H04N5/335

    CPC分类号: H04N5/378 H04N5/3742

    摘要: An image sensor includes a plurality of pixel cells organized into rows and columns of a pixel array. A bit line is coupled to each of the pixel cells within a line of the pixel array. Readout circuitry is coupled to the bit line to readout the image data from the pixel cells within the line. The readout circuitry includes a line amplifier coupled to the bit line to amplify the image data and first and second sample and convert circuits coupled in parallel to an output of the line amplifier to reciprocally and contemporaneously sample the image data and convert the image data from analog values to digital values.

    摘要翻译: 图像传感器包括被组织成像素阵列的行和列的多个像素单元。 位线耦合到像素阵列的一行内的每个像素单元。 读出电路耦合到位线以从线内的像素单元读出图像数据。 读出电路包括耦合到位线以放大图像数据的线路放大器以及并行耦合到线路放大器的输出端的第一和第二采样和转换电路,以便对该图像数据进行往复同时采样并将图像数据从模拟 值到数字值。

    Selective gain control circuit
    9.
    发明授权
    Selective gain control circuit 有权
    选择增益控制电路

    公开(公告)号:US08952795B2

    公开(公告)日:2015-02-10

    申请号:US13605919

    申请日:2012-09-06

    IPC分类号: H04N3/14 H04N5/335

    CPC分类号: H04N5/378 H04N5/365

    摘要: A circuit for providing signal amplification with reduced fixed pattern noise. In an embodiment, the circuit includes an amplifier and a plurality of legs coupled in parallel with one another between a first node for an input of the amplifier and a second node for an output of the amplifier. Control logic selects a first combination of the plurality of legs for a first configuration of the circuit to provide a first loop gain with the amplifier. In another embodiment, the control logic further selects a second combination of the plurality of legs for a second configuration of the circuit to provide a second loop gain with the amplifier, wherein the first loop gain is substantially equal to the second loop gain.

    摘要翻译: 用于提供具有降低的固定图案噪声的信号放大的电路。 在一个实施例中,该电路包括放大器和多个支路,它们彼此并联连接在用于放大器的输入的第一节点和用于放大器输出的第二节点之间。 控制逻辑选择用于电路的第一配置的多个支路的第一组合以便与放大器提供第一环路增益。 在另一个实施例中,控制逻辑还选择多个支路的第二组合用于电路的第二配置,以便与放大器提供第二环路增益,其中第一环路增益基本上等于第二环路增益。

    Image sensor with pipelined column analog-to-digital converters
    10.
    发明授权
    Image sensor with pipelined column analog-to-digital converters 有权
    具有流水线列模数转换器的图像传感器

    公开(公告)号:US08730364B2

    公开(公告)日:2014-05-20

    申请号:US13080031

    申请日:2011-04-05

    IPC分类号: H04N5/335

    CPC分类号: H04N5/378 H04N5/3742

    摘要: An image sensor includes a plurality of pixel cells organized into rows and columns of a pixel array. A bit line is coupled to each of the pixel cells within a line of the pixel array. Readout circuitry is coupled to the bit line to readout the image data from the pixel cells within the line. The readout circuitry includes a line amplifier coupled to the bit line to amplify the image data and first and second sample and convert circuits coupled in parallel to an output of the line amplifier to reciprocally and contemporaneously sample the image data and convert the image data from analog values to digital values.

    摘要翻译: 图像传感器包括被组织成像素阵列的行和列的多个像素单元。 位线耦合到像素阵列的一行内的每个像素单元。 读出电路耦合到位线以从线内的像素单元读出图像数据。 读出电路包括耦合到位线以放大图像数据的线路放大器以及并行耦合到线路放大器的输出端的第一和第二采样和转换电路,以便对该图像数据进行往复同时采样并将图像数据从模拟 值到数字值。