摘要:
The present invention provides a compact row decoder with multiple voltage support. The row decoder may include a global driver and a plurality of row-level drivers. The global driver may include one or more voltage level shifters that are operable to provide multiple voltages required to drive each of the plurality of row-level drivers. The plurality of row-level drivers each may include only one voltage level shifter. In an example, the row-level driver includes an address decoder implemented in a digital domain providing an address selection signal, a voltage level shifter to convert the address selection signal to an analog domain, and a tow driver receiving driving signals from the global driver. The row driver has no voltage level shifter contained therein. Thus, the row-level drivers and the row decoder may be very compact. The present invention further provides a CMOS image sensor including the row decoder and a method of operating the CMOS image sensor.
摘要:
A method of capturing an image includes activating a first image sensor and capturing a sequence of images with a second image sensor. A determination is made as to whether the sequence of images captured by the second image sensor includes a shutter gesture. If a shutter gesture is included in the sequence of images captured by the second image sensor, the first image sensor captures a target image in response.
摘要:
Embodiments of an image sensor including a pixel array with a plurality of pixels arranged into rows and columns. Control circuitry coupled to the pixels in each row, and an analog-to-digital converter is coupled to the pixels in each column of the pixel array. Each analog-to-digital converter includes a ramp comparator, and a variable current source coupled to the ramp comparator to provide a variable bias current to the ramp comparator. The bias current can adjusted during reading of a row of pixels according to a dynamic bias current profile that maintains at least a specified margin between the random noise of the pixels and an acceptable noise level. Other embodiments are disclosed and claimed.
摘要:
An image sensor includes a plurality of pixel cells organized into rows and columns of a pixel array. A bit line is coupled to each of the pixel cells within a line of the pixel array. Readout circuitry is coupled to the bit line to readout the image data from the pixel cells within the line. The readout circuitry includes a line amplifier coupled to the bit line to amplify the image data and first and second sample and convert circuits coupled in parallel to an output of the line amplifier to reciprocally and contemporaneously sample the image data and convert the image data from analog values to digital values.
摘要:
The present invention relates to an integrated circuit having a flexible reference. In an example, the integrated circuit includes a reference generator, and the reference generator can generate a flexible reference signal in response to a control signal. The flexible reference signal can be changed freely by adjusting the control signal. By providing the flexible reference, the present invention can enhance the capability of verification and characterization for an integrated circuit design and reduce the physical layout area of the integrated circuit design. The present invention also relates to a method of operating the integrated circuit with a flexible reference signal
摘要:
A switch circuit including structures to reduce the effects of charge injection. In an embodiment, a first transistor of the switch circuit is to receive a first signal and first and second dummy transistors of the switch circuit are each to receive a second signal, wherein the first transistor is connected between the first and second dummy transistors. The second signal is complementary to the first signal. In another embodiment, the first transistor, the first dummy transistor and the second dummy transistors are each connected via respective body connections to a first low supply voltage.
摘要:
A method of an aspect includes acquiring analog image data with a pixel array, and reading out the analog image data from the pixel array. The analog image data is converted to digital image data by performing an analog-to-digital (A/D) conversion using a multiple slope voltage ramp. At least some of the digital image data is adjusted with calibration data. Other methods, apparatus, and systems, are also disclosed.
摘要:
A comparator circuit for generating a signal representing a comparison of an input signal and a reference signal. In an embodiment, the comparator circuit includes a first stage and a second stage to provide respective signal amplification, where switch circuitry of the second stage switchedly couples respective elements of the first and second stages. The comparator circuit further includes a third stage to generate an output signal based on an intermediate signal of the second stage. In another embodiment, feedback circuitry of the comparator circuit is to selectively control a voltage of the output stage based on the output signal.
摘要:
A switch circuit including structures to reduce the effects of charge injection. In an embodiment, a first transistor of the switch circuit is to receive a first signal and first and second dummy transistors of the switch circuit are each to receive a second signal, wherein the first transistor is connected between the first and second dummy transistors. The second signal is complementary to the first signal. In another embodiment, the first transistor, the first dummy transistor and the second dummy transistors are each connected via respective body connections to a first low supply voltage.
摘要:
An example image sensor includes a plurality of pixels arranged in an array of columns and rows, a row driver, and a control logic circuit. The row driver is coupled to pixels in a row of the array to provide a variable driving voltage to drive transistors included in the pixels of the row. The control logic circuit is coupled to provide one or more control logic signals to the row driver. The row driver adjusts a magnitude of the driving voltage in response to the one or more control logic signals.