公开(公告)号：US20170249248A1

公开(公告)日：2017-08-31

申请号：US15500087

申请日：2014-11-12

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Vincent NGUYEN ,  David F. HEINRICH ,  Han WANG ,  Patrick A. RAYMOND ,  Raghavan V. VENUGOPAL ,  Barry L. OLAWSKY

IPC: G06F12/0804 ,  G06F13/42 ,  G06F1/32 ,  G06F3/06

CPC classification number: G06F12/0804 ,  G06F1/263 ,  G06F1/30 ,  G06F1/3287 ,  G06F3/06 ,  G06F3/0619 ,  G06F3/0625 ,  G06F3/0647 ,  G06F3/0685 ,  G06F11/00 ,  G06F11/08 ,  G06F11/14 ,  G06F11/3062 ,  G06F13/4282 ,  G06F2212/1032 ,  G06F2213/0026

Abstract: Example implementations relate to data backup. For example, a data backup can include tracking a location of a data block on a first node and initiating a transfer, utilizing a backup power supply, of the data block to a non-volatile memory location on a second node in response to an interruption of a primary power supply. In addition, the data block can be restored to the tracked location of the first node responsive to a restoration of the primary power supply.

公开(公告)号：US20210315124A1

公开(公告)日：2021-10-07

申请号：US16839797

申请日：2020-04-03

Applicant: Hewlett Packard Enterprise Development LP

Inventor： John NORTON ,  Vincent NGUYEN

IPC: H05K7/14 ,  H01R12/75 ,  H01R12/73 ,  H05K1/18 ,  H05K5/00

Abstract: A module, comprising: a printed circuit board (PCB); a power and management connector disposed on the PCB to connect to a computing device via a first cable; a data connector disposed on the PCB to connect to the computing device via a second cable; and a memory slot, to accept a memory device, disposed on the PCB and connected to the power and management connector and the data connector.

公开(公告)号：US20180203750A1

公开(公告)日：2018-07-19

申请号：US15744043

申请日：2015-07-17

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Vincent NGUYEN ,  Robert E VAN CLEVE ,  Kevin G DEPEW ,  Scott P FAASSE

IPC: G06F11/00 ,  G06Q10/00 ,  G06F11/34 ,  G01R23/02 ,  G01R31/02

Abstract: In one example in accordance with the present disclosure, a method for determining operating frequencies includes receiving a warranty period for a computer component. The method includes determining an operating frequency that will cause a predicted life cycle of the computer component operating at the operating frequency to fall within the warranty period. The method includes setting the computer component to operate at the operating frequency.

公开(公告)号：US20170205857A1

公开(公告)日：2017-07-20

申请号：US15328707

申请日：2014-07-31

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Earl W MOORE ,  Vincent NGUYEN

IPC: G06F1/18 ,  G11B33/00 ,  A47B88/49

CPC classification number: G06F1/187 ,  A47B88/49 ,  G11B33/005

Abstract: An example mounting assembly is provided herein. The mounting assembly includes a first cage, a second cage, a rail member, a rigid cable member, a latch member, and a lock mechanism. The rail member to move the first cage and the second cage between an installed position, an access position, and a transitional position. The rigid cable member to move with the first cage and the second cage along the rail member. The latch member to retain the first cage and the second cage in the installed position. The lock mechanism to hold the second cage in the access position.

公开(公告)号：US20190008031A1

公开(公告)日：2019-01-03

申请号：US16065435

申请日：2016-01-28

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Vincent NGUYEN ,  Sung Hsia KUO ,  Ho M LAI

IPC: H05K1/02 ,  H05K3/12 ,  H05K1/18 ,  H05K1/11

Abstract: An example method includes linking a transmit line and receive line to a respective via, and printing two paths to each via, wherein each path is interrupted by two pairs of contacts. When a first resistor is in a first pair of contacts at a receive via, first signal is formed between a receive point of a first connector and the receive line. When a first capacitor is in first pair of contacts at a transmit via, second signal is formed between transmit point of first connector and the transmit line. When a second resistor is in second pair of contacts at receive via, third signal is formed between receive point of a second connector and the receive line. When a second capacitor is in second pair of contacts at transmit via, fourth signal is formed between a transmit point of second connector and the transmit line.

公开(公告)号：US20170249279A1

公开(公告)日：2017-08-31

申请号：US15500088

申请日：2015-01-28

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Hung-Chu LEE ,  Tse-Jen SUNG ,  Chui Ching CHIU ,  Kang-Jong PENG ,  Vincent NGUYEN ,  Jim KUO

IPC: G06F13/42 ,  G06T1/20 ,  G06F13/40

CPC classification number: G06F13/4282 ,  G06F13/385 ,  G06F13/4068 ,  G06F2213/0026 ,  G06T1/20

Abstract: A computing system for dynamically changing at least one input/output configuration between a motherboard of a computing device and at least one node connected to the motherboard includes a plurality of interchangeable topology transformation units (TTU) risers to connect at least one processing device located on a motherboard of the computing system to a plurality of computing nodes. Each of the TTU risers include topologies designed to support different workloads with respect to another TTU riser.