公开(公告)号：US09029979B2

公开(公告)日：2015-05-12

申请号：US13684314

申请日：2012-11-23

Applicant: Hitachi, Ltd.

Inventor： Hiroyuki Yoshimoto ,  Ryuta Tsuchiya ,  Naoki Tega ,  Digh Hisamoto ,  Yasuhiro Shimamoto ,  Yuki Mori

IPC: H01L21/70 ,  H01L29/16 ,  H01L21/04 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L29/04

CPC classification number: H01L29/1608 ,  H01L21/0475 ,  H01L21/049 ,  H01L29/045 ,  H01L29/41758 ,  H01L29/4238 ,  H01L29/66068 ,  H01L29/7827

Abstract: A trench groove is formed and a silicon oxide film is buried in the periphery of a channel region of (0001) surface 4h-SiC semiconductor element. The oxide film in the trench groove is defined in such a planar layout that a tensile strain is applied along the direction of the c-axis and a compressive strain is applied along two or more of axes on a plane perpendicular to the c-axis. For example, trench grooves buried with an oxide film may be configured to such a layout that they are in a trigonal shape surrounding the channel, or are arranged symmetrically with respect to the channel as a center when arranged discretely.

Abstract translation: 形成沟槽，在（0001）面4h-SiC半导体元件的沟道区的周围埋置氧化硅膜。 沟槽中的氧化膜以这样的平面布局限定，使得沿着c轴的方向施加拉伸应变，并且沿着与c轴垂直的平面上的两个或更多个轴施加压缩应变。 例如，埋置有氧化物膜的沟槽沟可以被配置为使得它们处于围绕通道的三角形状，或者当离散布置时相对于通道对称地布置为中心。

公开(公告)号：US20140217422A1

公开(公告)日：2014-08-07

申请号：US14240376

申请日：2012-03-30

Applicant: HITACHI, LTD.

Inventor： Toshiyuki Mine ,  Yasuhiro Shimamoto ,  Hirotaka Hamamura

IPC: H01L29/16 ,  H01L29/792

CPC classification number: H01L29/1608 ,  H01L21/046 ,  H01L21/049 ,  H01L29/513 ,  H01L29/66068 ,  H01L29/7802 ,  H01L29/7828 ,  H01L29/792

Abstract: In a SiC-MOSFET power device for which a SiC substrate is used, a laminated insulating film having a charge-trapping characteristic is employed as a gate insulating film of the SiC-DiMOSFET, and charges are injected into the laminated insulating film, thereby suppressing a change in the gate threshold voltage.

Abstract translation: 在使用SiC衬底的SiC-MOSFET功率器件中，采用具有电荷俘获特性的层叠绝缘膜作为SiC-DiMOSFET的栅极绝缘膜，并且将电荷注入到层叠绝缘膜中，从而抑制 门极电压的变化。