公开(公告)号：US20160013549A1

公开(公告)日：2016-01-14

申请号：US14617361

申请日：2015-02-09

Applicant: HRL LABORATORIES LLC

Inventor： James H. SCHAFFNER ,  Hyok J. Song ,  Keyvan R. Sayyah ,  Pamela R. Patterson ,  Jeong-Sun Moon ,  Alan E. Reamon ,  Keerti S. Kona ,  Joseph S. Colburn

IPC: H01Q3/01 ,  H01Q21/00 ,  H01Q9/04 ,  H01Q1/06 ,  H01Q3/26

CPC classification number: H01Q3/01 ,  H01Q1/06 ,  H01Q3/2676 ,  H01Q3/46 ,  H01Q9/0407 ,  H01Q15/0026 ,  H01Q19/005 ,  H01Q21/0093 ,  H01Q21/065

Abstract: A reconfigurable electro-magnetic tile includes a laser layer including a plurality of lasers, and a pixelated surface comprising a plurality of metal patches and a plurality of switches, wherein each respective switch of the plurality of switches is in a gap between a first respective metal patch and a second respective metal patch, wherein each respective switch is optically coupled to at least one respective laser of the plurality of lasers, and wherein each switch of the plurality of switches comprises a phase change material.

Abstract translation: 可重构电磁瓦片包括包括多个激光器的激光层和包括多个金属贴片和多个开关的像素化表面，其中多个开关中的每个开关处于第一相应金属 贴片和第二相应的金属贴片，其中每个相应的开关光学耦合到所述多个激光器中的至少一个相应的激光器，并且其中所述多个开关中的每个开关包括相变材料。

公开(公告)号：US09972905B2

公开(公告)日：2018-05-15

申请号：US14617361

申请日：2015-02-09

Applicant: HRL LABORATORIES LLC

Inventor： James H. Schaffner ,  Hyok J. Song ,  Keyvan R. Sayyah ,  Pamela R. Patterson ,  Jeong-Sun Moon ,  Alan E. Reamon ,  Keerti S. Kona ,  Joseph S. Colburn

IPC: H01Q3/01 ,  H01Q1/06 ,  H01Q9/04 ,  H01Q21/00 ,  H01Q21/06 ,  H01Q3/46 ,  H01Q19/00 ,  H01Q3/26

CPC classification number: H01Q3/01 ,  H01Q1/06 ,  H01Q3/2676 ,  H01Q3/46 ,  H01Q9/0407 ,  H01Q15/0026 ,  H01Q19/005 ,  H01Q21/0093 ,  H01Q21/065

Abstract: A reconfigurable electro-magnetic tile includes a laser layer including a plurality of lasers, and a pixelated surface comprising a plurality of metal patches and a plurality of switches, wherein each respective switch of the plurality of switches is in a gap between a first respective metal patch and a second respective metal patch, wherein each respective switch is optically coupled to at least one respective laser of the plurality of lasers, and wherein each switch of the plurality of switches comprises a phase change material.

公开(公告)号：US09843339B1

公开(公告)日：2017-12-12

申请号：US15248358

申请日：2016-08-26

Applicant: HRL Laboratories, LLC

Inventor： Yen-Cheng Kuan ,  Randall White ,  Zhiwei A. Xu ,  Donald A. Hitko ,  Peter Petre ,  Jose Cruz-Albrecht ,  Alan E. Reamon

IPC: H03M1/12 ,  H03M1/10 ,  G06F1/12 ,  G06F1/04

CPC classification number: G06F1/04 ,  G06F1/12

Abstract: An asynchronous pulse domain to synchronous digital domain converter for converting pulse domain signals in an input asynchronous pulse domain data stream to synchronous digital domain signals in a data output stream. The converter comprises a plurality of counters arranged in a ring configuration with only one counter in the ring being responsive at any given time to positive and negative going pulses in the input asynchronous pulse domain data stream, each counter, when so responsive, counting a number of time units between either (i) a positive going pulse and an immediately following negative going pulse or (ii) a negative going pulse and an immediately following positive going pulse, the counts of the counters when so responsive being synchronously converted to synchronous digital domain signals in the data output stream. The disclosed asynchronous pulse domain to synchronous digital domain converter can be used with spike domain signals if desired.

公开(公告)号：US09484918B1

公开(公告)日：2016-11-01

申请号：US14834837

申请日：2015-08-25

Applicant: HRL LABORATORIES, LLC

Inventor： Yen-Cheng Kuan ,  Ining Ku ,  Zhiwei A. Xu ,  Susan L. Morton ,  Donald A. Hitko ,  Peter Petre ,  Jose Cruz-Albrecht ,  Alan E. Reamon

IPC: H03K19/003 ,  H03K19/00

CPC classification number: H03K19/00369 ,  H01Q3/26 ,  H01Q3/2682 ,  H03K3/86 ,  H03K19/0016 ,  H04B7/0617 ,  H04B7/0671

Abstract: A pulse domain 1 to 2N demultiplexer has a (i) pair of N stage counters each of which is responsive to an incoming pulse train in the pulse domain, one of the counters being responsive to leading edges of the pulses in the incoming pulse train and the other one of the counters being responsive to trailing edges of the pulses in the incoming pulse train and (ii) a control logic responsive to the states through which the pair of counters count, the control logic including 2N gate arrangements, each of the 2N gate arrangements generating a output signal of the pulse domain 1 to 2N demultiplexer.

Abstract translation: 脉冲域1至2N解复用器具有（i）一对N级计数器，每个N级计数器响应于脉冲域中的输入脉冲序列，其中一个计数器响应于输入脉冲串中的脉冲的前沿， 另一个计数器响应输入脉冲串中的脉冲的后沿，以及（ii）响应于该对计数器计数的状态的控制逻辑，包括2N个门装置的控制逻辑，2N个 门结构产生脉冲域1至2N解复用器的输出信号。