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公开(公告)号：US20240264760A1
公开(公告)日：2024-08-08
申请号：US18635269
申请日：2024-04-15
Applicant: Huawei Technologies Co., Ltd.
Inventor： Ge Du , Yu Hu , Jiancen Hou
IPC: G06F3/06 , G06F12/02 , G06F12/0868
CPC classification number: G06F3/0647 , G06F3/0604 , G06F3/061 , G06F3/0646 , G06F3/0688 , G06F12/0246 , G06F12/0868
Abstract: A host of a storage system is coupled to multiple SSDs. Each SSD is configured with a migration cache, and each SSD corresponds to one piece of access information. The host obtains migration data information of to-be-migrated data in a source SSD, determines a target SSD, and sends a read instruction carrying information about to-be-migrated data and the target SSD to the source SSD. The source SSD reads a data block according to the read instruction from a flash memory of the source SSD into a migration cache of the target SSD. After a read instruction is completed by the SSD, the host sends a write instruction to the target SSD to instruct the target SSD to write the data block in the cache of the target SSD to a flash memory of the target SSD.
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公开(公告)号：US20160154687A1
公开(公告)日：2016-06-02
申请号：US15015303
申请日：2016-02-04
Applicant: Huawei Technologies Co., Ltd.
Inventor： Shuchang Shan , Bing Li , Yu Hu , Xiang Gao
CPC classification number: G06F11/008 , G06F11/1004
Abstract: A hierarchical and flexible method for setting a memory reliability level to implement a memory access mechanism for different running object types and different reliability levels. The method implemented by the memory device includes receiving reliability level information of a running object of a processor sent by the processor; establishing a mapping relationship according to the reliability level information of the running object; receiving an access request sent by the processor; and accessing data of the running object and error-tolerant code of the running object according to the access request and the mapping relationship.
Abstract translation: 一种用于设置内存可靠性级别以实现不同运行对象类型和不同可靠性级别的内存访问机制的分层和灵活方法。 由该存储装置实现的方法包括接收由处理器发送的处理器的运行对象的可靠性级别信息; 根据运行对象的可靠性级别信息建立映射关系; 接收处理器发送的访问请求; 并根据访问请求和映射关系访问正在运行的对象的数据和运行对象的容错代码。
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公开(公告)号：US20230350595A1
公开(公告)日：2023-11-02
申请号：US18313467
申请日：2023-05-08
Applicant: Huawei Technologies Co., Ltd.
Inventor： Ge Du , Yu Hu , Jiancen Hou
IPC: G06F3/06 , G06F12/0868 , G06F12/02
CPC classification number: G06F3/0647 , G06F3/0604 , G06F3/0688 , G06F12/0868 , G06F12/0246 , G06F3/0646 , G06F3/061
Abstract: A host of a storage system is coupled to multiple SSDs. Each SSD is configured with a migration cache, and each SSD corresponds to one piece of access information. The host obtains migration data information of to-be-migrated data in a source SSD, determines a target SSD, and sends a read instruction carrying information about to-be-migrated data and the target SSD to the source SSD. The source SSD reads a data block according to the read instruction from a flash memory of the source SSD into a migration cache of the target SSD. After a read instruction is completed by the SSD, the host sends a write instruction to the target SSD to instruct the target SSD to write the data block in the cache of the target SSD to a flash memory of the target SSD.
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公开(公告)号：US09811416B2
公开(公告)日：2017-11-07
申请号：US15010326
申请日：2016-01-29
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Xiang Gao , Bing Li , Shuchang Shan , Yu Hu
CPC classification number: G06F11/1068 , G06F11/1044 , G06F11/108 , G11C29/52
Abstract: A memory access apparatus includes a read-write module and a processing module. The read-write module is configured to store an error detecting code in an (M+2)th DRAM in the memory row, and store the error correcting code in a Zth DRAM in the memory row, where Z is a positive integer, 1≦Z≦(M+1), and error correcting codes in consecutive (M+1) memory rows are stored in different DRAMs. The processing module is configured to calculate one group of error detecting code for each single chip burst cluster (SCBC) in a memory row, and calculate one group of error correcting code for all SCBCs in a memory row.
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公开(公告)号：US09735871B2
公开(公告)日：2017-08-15
申请号：US14957621
申请日：2015-12-03
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Zhong Zhang , Sheng Li , Yu Hu , Xiaoyu Ge , Yongyao Li , Xin Qiu
IPC: H04B10/50 , H04B10/2507 , H04B10/079 , H04B10/80 , G06F13/42
CPC classification number: H04B10/2507 , G06F13/4282 , H04B10/0799 , H04B10/50 , H04B10/801
Abstract: A method, an apparatus, and a communication node for suppressing output noises of peripheral component interconnect express (PCIe) devices in optical fiber communication is provided. The communication node includes a PCIe chip and a detection and control circuit connected to a transmitting end of the PCIe chip. The PCIe chip transmits an electrical signal by a transmitter of a first lane. The detection and control circuit detects a differential-mode voltage of the electrical signal. If the differential-mode voltage is lower than a first threshold, the detection and control circuit controls an optical module connected to the PCIe chip not to transmit an optical signal through the first lane of the optical module. When a PCIe system includes the communication node, output noises of the transmitter is suppressed, and a normal optical fiber communication link is ensured.
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Patent Agency Ranking
公开(公告)号：US20230359400A1
公开(公告)日：2023-11-09
申请号：US18353334
申请日：2023-07-17
Applicant: Huawei Technologies Co., Ltd.
Inventor： Huawei Liu , Yu Hu , Can Chen , Jinshui Liu , Xiaochu Li , Chunyi Tan
IPC: G06F3/06
CPC classification number: G06F3/0659 , G06F3/0611 , G06F3/0617 , G06F3/064 , G06F3/0653 , G06F3/0665 , G06F3/067 , G06F3/0689
Abstract: A first storage node communicates with at least one second storage node. A physical disk included in the at least one second storage node is mapped as a virtual disk of the first storage node. The method may include: receiving a first write request, where the first write request carries first to-be-written data; striping the first to-be-written data to obtain striped data, and writing the striped data to a physical disk and/or the virtual disk of the first storage node; and recording a write location of the striped data. For example, the technical solution may be applied to a storage system that includes an NVMe SSD.
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公开(公告)号：US11644994B2
公开(公告)日：2023-05-09
申请号：US16985575
申请日：2020-08-05
Applicant: Huawei Technologies Co., Ltd.
Inventor： Ge Du , Yu Hu , Jiancen Hou
IPC: G06F12/00 , G06F3/06 , G06F12/0868 , G06F12/02
CPC classification number: G06F3/0647 , G06F3/061 , G06F3/0604 , G06F3/0646 , G06F3/0688 , G06F12/0246 , G06F12/0868
Abstract: A host of a storage system is coupled to multiple SSDs. Each SSD is configured with a migration cache, and each SSD corresponds to one piece of access information. The host obtains migration data information of to-be-migrated data in a source SSD, determines a target SSD, and sends a read instruction carrying information about to-be-migrated data and the target SSD to the source SSD. The source SSD reads a data block according to the read instruction from a flash memory of the source SSD into a migration cache of the target SSD. After a read instruction is completed by the SSD, the host sends a write instruction to the target SSD to instruct the target SSD to write the data block in the cache of the target SSD to a flash memory of the target SSD.
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公开(公告)号：US11489919B2
公开(公告)日：2022-11-01
申请号：US16362210
申请日：2019-03-22
Applicant: Huawei Technologies Co., Ltd.
Inventor： Hongcai Cheng , Haitao Guo , Hongguang Liu , Hao Chen , Sicong Li , Chunyi Tan , Yu Hu , Can Chen
IPC: H04L67/1097 , H04L69/16 , G06F15/173 , G06F3/06 , H04L65/40
Abstract: A data processing system and method, and a corresponding apparatus, where the data processing system includes a controller and at least two storage nodes. The controller is configured to receive, using a first coupling between the controller and a host, an operation request received from the host, where the operation request includes an identity of target data and an operation type, determine at least one target storage node from the at least two storage nodes according to the identity of the target data, and send an instruction message to the at least one target storage node using a second coupling to the at least one target storage node, where the at least one target storage node is configured to send the target data to the host or obtain the target data from the host according to the instruction message.
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公开(公告)号：US11416172B2
公开(公告)日：2022-08-16
申请号：US16785008
申请日：2020-02-07
Applicant: Huawei Technologies Co., Ltd.
Inventor： Huawei Liu , Yu Hu , Can Chen , Jinshui Liu , Xiaochu Li , Chunyi Tan
IPC: G06F3/06
Abstract: A first storage node communicates with at least one second storage node. A physical disk included in the at least one second storage node is mapped as a virtual disk of the first storage node. The method may include: receiving a first write request, where the first write request carries first to-be-written data; striping the first to-be-written data to obtain striped data, and writing the striped data to a physical disk and/or the virtual disk of the first storage node; and recording a write location of the striped data. For example, the technical solution may be applied to a storage system that includes an NVMe SSD.
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公开(公告)号：US10795599B2
公开(公告)日：2020-10-06
申请号：US16423341
申请日：2019-05-28
Applicant: Huawei Technologies Co., Ltd.
Inventor： Ge Du , Yu Hu , Jiancen Hou
IPC: G06F12/00 , G06F3/06 , G06F12/0868 , G06F12/02
Abstract: A host of a storage system is coupled to multiple SSDs. Each SSD is configured with a migration cache, and each SSD corresponds to one piece of access information. The host obtains migration data information of to-be-migrated data in a source SSD, determines a target SSD, and sends a read instruction carrying information about to-be-migrated data and the target SSD to the source SSD. The source SSD reads a data block according to the read instruction from a flash memory of the source SSD into a migration cache of the target SSD. After a read instruction is completed by the SSD, the host sends a write instruction to the target SSD to instruct the target SSD to write the data block in the cache of the target SSD to a flash memory of the target SSD.
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