Abstract:
A superlattice phase-change thin film with a low density change, a phase-change memory and a preparation method. The superlattice phase-change thin film includes first phase-change layers (7) and second phase-change layers (8) that are alternately stacked to form a periodic structure; during crystallization, the first phase-change layer (7) has a conventional positive density change, and the second phase-change layer (8) has an abnormal negative density change, therefore, the abnormal density reduction and volume increase of the second phase-change layer (8) during crystallization can be used to offset the volume reduction of the first phase-change layer (7) during crystallization.
Abstract:
Disclosed are an OTS-based dynamic storage structure and an operation method thereof. The OTS-based dynamic storage structure includes a plurality of storage units distributed in an array, and each storage unit includes an OTS gating transistor and a storage capacitor. The OTS gating transistor has two states, namely, high resistance state and low resistance state. When the voltage across the OTS gating transistor exceeds the threshold voltage Vth, the OTS gating transistor is switched from the high resistance state to the low resistance state. When the voltage across the OTS gating transistor in the low resistance state is lower than the holding voltage Vhold, the OTS gating transistor is switched from the low resistance state to the high resistance state.
Abstract:
A high-speed and large-current adjustable pulse circuit, an operating circuit and an operating method of a phase-change memory are provided. The high-speed and large-current adjustable pulse circuit is provided with a clamping structure, a current mirror structure and a leakage current shutdown structure. The clamping structure including a clamping operational amplifier and a first MOS transistor is configured to generate a reference current. The current mirror structure is configured to generate an output current proportional to the reference current. The leakage current shutdown structure is configured to turn off the current mirror structure and reduce leakage current when pulse disappear. In this way, a device with an adjustable current and a reduced leakage current is realized.
Abstract:
Disclosed by the disclosure is a convolutional neural network on-chip learning system based on non-volatile memory, comprising: an input module, a convolutional neural network module, an output module and a weight update module. The on-chip learning of the convolutional neural network module implements the synaptic function by using the characteristic of the memristor, and the convolutional kernel value or synaptic weight value is stored in a memristor unit; the input module converts the input signal into the voltage signal; the convolutional neural network module converts the input voltage signal layer-by-layer, and transmits the result to the output module to obtain the output of the network; and the weight update module adjusts the conductance value of the memristor in the convolutional neural network module according to the result of the output module to update the network convolutional kernel value or synaptic weight value.
Abstract:
A phase-change memory cell, including, in sequence in the following order: a first electrode layer, a switching layer comprising vanadium oxide (VOx) material, a phase-change material layer, and a second electrode layer, is provided. The switching layer is adapted to control the phase-change material layer to switch between a crystalline state and an amorphous state when a voltage is applied to the first electrode layer and the second electrode layer.
Abstract:
A non-volatile logic device, including: a substrate, a magnetic head, a base electrode, an insulating layer, a phase-change magnetic film, and a top electrode. The substrate includes a silicon substrate and an active layer attached to the silicon substrate. The base electrode includes an N-type silicon layer, a P-type silicon layer and a heating layer, the N-type silicon layer and the P-type silicon layer constitute a PN diode structure, and the size of the heating layer is smaller than that of the P-type silicon layer. The phase-change magnetic film is deposited on the insulating layer and is electrically contacted with the heating layer. The top electrode and the base electrode are connected to an external electrical pulse signal, and an external magnetic field parallel to a two dimensional plane of the phase-change magnetic film is applied to the non-volatile logic device.
Abstract:
The disclosure provides a convolution operation accelerator and a convolution operation method and belongs to the field of microelectronic devices. Input data of each word line may be subjected to a multiply-accumulate operation together with two upper and lower layers of convolution kernel units, so that natural sliding of the convolution kernel units in a y direction in two-dimensional input is achieved. The oblique bit lines and multiple copies of a convolution kernel in each layer of a non-volatile memory array may enable a multiplication operation between one piece of input data and convolution kernel data at different positions in the same convolution kernel. In this way, the natural sliding of the convolution kernel units in an x direction in the two-dimensional input is achieved.
Abstract:
A method and a system of designing a memristor-based naive Bayes classifier and a classifier belonging to the field of information technology are provided. The method includes: constructing a naive Bayes classifier including a memristor array of M rows by 2N columns, where M is the number of classification types, and N is the number of pixels in a picture; calculating the number hj,2i-1 of the pixel value of 0 and the number hj,2i of the pixel value of 1 in an ith pixel in the jth training sample, where j=1, 2, . . . , and M; and applying hj,2i-1 pulses to a memristor Rj,2i-1 in a jth row and a 2i-1th column to modulate the conductance of the memristor Rj,2i-1 and applying hj,2i pulses to a memristor Rj,2i in the jth row and a 2ith column to modulate the conductance of the memristor Rj,2i.
Abstract:
Disclosed in the present invention are a chalcogenide phase change material based all-optical switch and a manufacturing method therefor, relating to the field of optical communications. The all-optical switch comprises: stacked in sequence, a cover layer film, a chalcogenide phase change material film, an isolation layer film, a silicon photonic crystal, and a substrate. The silicon photonic crystal comprises a nano-porous structure such that the silicon photonic crystal has a Fano resonance effect. When the all-optical switch is used, the state of the chalcogenide phase change material film is controlled by means of laser, and the resonance state of the silicon photonic crystal is modulated to implement modulation of signal light transmissivity; the modulation range is within a communication band from 1500 nm to 1600 nm, thereby implementing an optical switch. The all-optical switch of the present invention has the characteristics of high contrast ratio, high rate and low loss.
Abstract:
An operating method for improving the performance of a selector device is provided, including: determining and applying a direct current (DC) or alternating current (AC) operating voltage and a limit current of the selector device, so that the selector device circulates until a off-state resistance is reduced; continuously applying the operating voltage and the limit current to the selector device, so that the selector device circulates until the off-state resistance is reduced to a minimum value; continuously applying the operating voltage and the limit current to the selector device, so that the selector device circulates until the off-state resistance is increased; continuously applying the operating voltage and the limit current to the selector device, so that the selector device circulates until the off-state resistance is increased to a maximum value; and adjusting the operating voltage and the limit current, and performing DC or AC operation pulsed operation on a selector.