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公开(公告)号:US08829562B2
公开(公告)日:2014-09-09
申请号:US13556335
申请日:2012-07-24
IPC分类号: H01L29/66 , H01L21/336
CPC分类号: H01L29/66 , H01L29/1095 , H01L29/407 , H01L29/408 , H01L29/42368 , H01L29/512 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/7397 , H01L29/7813
摘要: A semiconductor device includes a trench extending into a drift zone of a semiconductor body from a first surface. The semiconductor device further includes a gate electrode in the trench and a body region adjoining a sidewall of the trench. The semiconductor device further includes a dielectric structure in the trench. The dielectric structure includes a high-k dielectric in a lower part of the trench. The high-k dielectric includes a dielectric constant higher than that of SiO2. An extension of the high-k dielectric in a vertical direction perpendicular to the first surface is limited between a bottom side of the trench and a level where a bottom side of the body region adjoins the sidewall of the trench.
摘要翻译: 半导体器件包括从第一表面延伸到半导体本体的漂移区的沟槽。 半导体器件还包括在沟槽中的栅极电极和与沟槽的侧壁相邻的主体区域。 半导体器件还包括沟槽中的电介质结构。 电介质结构包括沟槽下部的高k电介质。 高k电介质包括比SiO2更高的介电常数。 在垂直于第一表面的垂直方向上的高k电介质的延伸在沟槽的底侧和体区的底侧与沟槽的侧壁相邻的水平之间被限制。
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公开(公告)号:US08482062B2
公开(公告)日:2013-07-09
申请号:US13610240
申请日:2012-09-11
申请人: Frank Pfirsch , Maria Cotorogea , Franz Hirler , Franz-Josef Niedernostheide , Thomas Raker , Hans-Joachim Schulze , Hans Peter Felsl
发明人: Frank Pfirsch , Maria Cotorogea , Franz Hirler , Franz-Josef Niedernostheide , Thomas Raker , Hans-Joachim Schulze , Hans Peter Felsl
IPC分类号: H01L29/66
CPC分类号: H01L29/7813 , H01L29/0619 , H01L29/0696 , H01L29/407 , H01L29/7397
摘要: A semiconductor device includes a first trench and a second trench extending into a semiconductor body from a surface. A body region of a first conductivity type adjoins a first sidewall of the first trench and a first sidewall of the second trench, the body region including a channel portion adjoining to a source structure and being configured to be controlled in its conductivity by a gate structure. The channel portion is formed at the first sidewall of the second trench and is not formed at the first sidewall of the first trench. An electrically floating semiconductor zone of the first conductivity type adjoins the first trench and has a bottom side located deeper within the semiconductor body than the bottom side of the body region.
摘要翻译: 半导体器件包括从表面延伸到半导体本体中的第一沟槽和第二沟槽。 第一导电类型的主体区域邻接第一沟槽的第一侧壁和第二沟槽的第一侧壁,主体区域包括邻近源极结构的沟道部分,并且被配置为通过栅极结构来控制其导电性 。 通道部分形成在第二沟槽的第一侧壁处,并且不形成在第一沟槽的第一侧壁处。 第一导电类型的电浮动半导体区域邻接第一沟槽,并且具有位于半导体本体内比底体区域的底侧更深的底侧。
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公开(公告)号:US20130001640A1
公开(公告)日:2013-01-03
申请号:US13610240
申请日:2012-09-11
申请人: Frank Pfirsch , Maria Cotorogea , Franz Hirler , Franz-Josef Niedernostheide , Thomas Raker , Hans-Joachim Schulze , Hans Peter Felsl
发明人: Frank Pfirsch , Maria Cotorogea , Franz Hirler , Franz-Josef Niedernostheide , Thomas Raker , Hans-Joachim Schulze , Hans Peter Felsl
IPC分类号: H01L29/739
CPC分类号: H01L29/7813 , H01L29/0619 , H01L29/0696 , H01L29/407 , H01L29/7397
摘要: A semiconductor device includes a first trench and a second trench extending into a semiconductor body from a surface. A body region of a first conductivity type adjoins a first sidewall of the first trench and a first sidewall of the second trench, the body region including a channel portion adjoining to a source structure and being configured to be controlled in its conductivity by a gate structure. The channel portion is formed at the first sidewall of the second trench and is not formed at the first sidewall of the first trench. An electrically floating semiconductor zone of the first conductivity type adjoins the first trench and has a bottom side located deeper within the semiconductor body than the bottom side of the body region.
摘要翻译: 半导体器件包括从表面延伸到半导体本体中的第一沟槽和第二沟槽。 第一导电类型的主体区域邻接第一沟槽的第一侧壁和第二沟槽的第一侧壁,主体区域包括邻近源极结构的沟道部分,并且被配置为通过栅极结构来控制其导电性 。 通道部分形成在第二沟槽的第一侧壁处,并且不形成在第一沟槽的第一侧壁处。 第一导电类型的电浮动半导体区域邻接第一沟槽,并且具有位于半导体本体内比底体区域的底侧更深的底侧。
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公开(公告)号:US20110018029A1
公开(公告)日:2011-01-27
申请号:US12506844
申请日:2009-07-21
申请人: Frank Pfirsch , Maria Cotorogea , Franz Hirler , Franz-Josef Niedernostheide , Thomas Raker , Hans-Joachim Schulze , Hans Peter Felsl
发明人: Frank Pfirsch , Maria Cotorogea , Franz Hirler , Franz-Josef Niedernostheide , Thomas Raker , Hans-Joachim Schulze , Hans Peter Felsl
IPC分类号: H01L29/739
CPC分类号: H01L29/7813 , H01L29/0619 , H01L29/0696 , H01L29/407 , H01L29/7397
摘要: A semiconductor device includes a first trench and a second trench extending into a semiconductor body from a surface. A body region of a first conductivity type adjoins a first sidewall of the first trench and a first sidewall of the second trench, the body region including a channel portion adjoining to a source structure and being configured to be controlled in its conductivity by a gate structure. The channel portion is formed at the first sidewall of the second trench and is not formed at the first sidewall of the first trench. An electrically floating semiconductor zone of the first conductivity type adjoins the first trench and has a bottom side located deeper within the semiconductor body than the bottom side of the body region.
摘要翻译: 半导体器件包括从表面延伸到半导体本体中的第一沟槽和第二沟槽。 第一导电类型的主体区域邻接第一沟槽的第一侧壁和第二沟槽的第一侧壁,主体区域包括邻近源极结构的沟道部分,并且被配置为通过栅极结构来控制其导电性 。 通道部分形成在第二沟槽的第一侧壁处,并且不形成在第一沟槽的第一侧壁处。 第一导电类型的电浮动半导体区域邻接第一沟槽,并且具有位于半导体本体内比底体区域的底侧更深的底侧。
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公开(公告)号:US08264033B2
公开(公告)日:2012-09-11
申请号:US12506844
申请日:2009-07-21
申请人: Frank Pfirsch , Maria Cotorogea , Franz Hirler , Franz-Josef Niedernostheide , Thomas Raker , Hans-Joachim Schulze , Hans Peter Felsl
发明人: Frank Pfirsch , Maria Cotorogea , Franz Hirler , Franz-Josef Niedernostheide , Thomas Raker , Hans-Joachim Schulze , Hans Peter Felsl
IPC分类号: H01L29/66
CPC分类号: H01L29/7813 , H01L29/0619 , H01L29/0696 , H01L29/407 , H01L29/7397
摘要: A semiconductor device includes a first trench and a second trench extending into a semiconductor body from a surface. A body region of a first conductivity type adjoins a first sidewall of the first trench and a first sidewall of the second trench, the body region including a channel portion adjoining to a source structure and being configured to be controlled in its conductivity by a gate structure. The channel portion is formed at the first sidewall of the second trench and is not formed at the first sidewall of the first trench. An electrically floating semiconductor zone of the first conductivity type adjoins the first trench and has a bottom side located deeper within the semiconductor body than the bottom side of the body region.
摘要翻译: 半导体器件包括从表面延伸到半导体本体中的第一沟槽和第二沟槽。 第一导电类型的主体区域邻接第一沟槽的第一侧壁和第二沟槽的第一侧壁,主体区域包括邻近源极结构的沟道部分,并且被配置为通过栅极结构来控制其导电性 。 通道部分形成在第二沟槽的第一侧壁处,并且不形成在第一沟槽的第一侧壁处。 第一导电类型的电浮动半导体区域邻接第一沟槽,并且具有位于半导体本体内比底体区域的底侧更深的底侧。
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公开(公告)号:US20140027812A1
公开(公告)日:2014-01-30
申请号:US13556335
申请日:2012-07-24
IPC分类号: H01L29/78 , H01L29/739
CPC分类号: H01L29/66 , H01L29/1095 , H01L29/407 , H01L29/408 , H01L29/42368 , H01L29/512 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/7397 , H01L29/7813
摘要: A semiconductor device includes a trench extending into a drift zone of a semiconductor body from a first surface. The semiconductor device further includes a gate electrode in the trench and a body region adjoining a sidewall of the trench. The semiconductor device further includes a dielectric structure in the trench. The dielectric structure includes a high-k dielectric in a lower part of the trench. The high-k dielectric includes a dielectric constant higher than that of SiO2. An extension of the high-k dielectric in a vertical direction perpendicular to the first surface is limited between a bottom side of the trench and a level where a bottom side of the body region adjoins the sidewall of the trench.
摘要翻译: 半导体器件包括从第一表面延伸到半导体本体的漂移区的沟槽。 半导体器件还包括在沟槽中的栅极电极和与沟槽的侧壁相邻的主体区域。 半导体器件还包括沟槽中的电介质结构。 电介质结构包括沟槽下部的高k电介质。 高k电介质包括比SiO2更高的介电常数。 在垂直于第一表面的垂直方向上的高k电介质的延伸在沟槽的底侧和体区的底侧与沟槽的侧壁相邻的水平之间被限制。
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公开(公告)号:US09412854B2
公开(公告)日:2016-08-09
申请号:US12908562
申请日:2010-10-20
IPC分类号: H01L27/082 , H01L29/739 , H01L25/07
CPC分类号: H01L29/7395 , H01L25/072 , H01L2924/0002 , H01L2924/00
摘要: An IGBT module is provided. The IGBT module has at least a first individual IGBT with a first softness during switching-off the IGBT module, and at least a second individual IGBT connected in parallel to the at least one first IGBT. The at least one second individual IGBT has a second softness during switching-off the IGBT module which is different than the first softness. Further a circuit and an electronic power device having two individual IGBTs, which are connected in parallel, are provided.
摘要翻译: 提供IGBT模块。 所述IGBT模块具有至少第一单独的IGBT,所述第一单独IGBT在关断所述IGBT模块期间具有第一柔性,以及至少第二独立IGBT并联连接至所述至少一个第一IGBT。 所述至少一个第二单独IGBT在关断IGBT模块期间具有与第一柔性不同的第二柔软度。 此外,提供了并联连接的具有两个单独的IGBT的电路和电子功率器件。
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公开(公告)号:US09105682B2
公开(公告)日:2015-08-11
申请号:US13036088
申请日:2011-02-28
IPC分类号: H01L29/739 , H01L29/744 , H01L29/06 , H01L29/10 , H01L29/861 , H01L29/87
CPC分类号: H01L29/744 , H01L29/0607 , H01L29/1016 , H01L29/8611 , H01L29/87
摘要: Disclosed is a semiconductor component that includes a semiconductor body, a first emitter region of a first conductivity type in the semiconductor body, a second emitter region of a second conductivity type spaced apart from the first emitter region in a vertical direction of the semiconductor body, a base region of one conductivity type arranged between the first emitter region and the second emitter region, and at least two higher doped regions of the same conductivity type as the base region and arranged in the base region. The at least two higher doped regions are spaced apart from one another in a lateral direction of the semiconductor body and separated from one another only by sections of the base region.
摘要翻译: 公开了一种半导体部件,其包括半导体本体,在半导体主体中具有第一导电类型的第一发射极区域,在半导体主体的垂直方向上与第一发射极区域间隔开的第二导电类型的第二发射极区域, 布置在第一发射极区域和第二发射极区域之间的一种导电类型的基极区域以及与基极区域相同导电类型的至少两个较高掺杂区域并且布置在基极区域中。 所述至少两个较高掺杂区域在所述半导体主体的横向方向上彼此间隔开,并且仅通过所述基极区域的一部分彼此分离。
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公开(公告)号:US20120217539A1
公开(公告)日:2012-08-30
申请号:US13036088
申请日:2011-02-28
IPC分类号: H01L29/739 , H01L29/74 , H01L29/861
CPC分类号: H01L29/744 , H01L29/0607 , H01L29/1016 , H01L29/8611 , H01L29/87
摘要: Disclosed is a semiconductor component that includes a semiconductor body, a first emitter region of a first conductivity type in the semiconductor body, a second emitter region of a second conductivity type spaced apart from the first emitter region in a vertical direction of the semiconductor body, a base region of one conductivity type arranged between the first emitter region and the second emitter region, and at least two higher doped regions of the same conductivity type as the base region and arranged in the base region. The at least two higher doped regions are spaced apart from one another in a lateral direction of the semiconductor body and separated from one another only by sections of the base region.
摘要翻译: 公开了一种半导体部件,其包括半导体本体,在半导体主体中具有第一导电类型的第一发射极区域,在半导体主体的垂直方向上与第一发射极区域间隔开的第二导电类型的第二发射极区域, 布置在第一发射极区域和第二发射极区域之间的一种导电类型的基极区域以及与基极区域相同导电类型的至少两个较高掺杂区域并且布置在基极区域中。 所述至少两个较高掺杂区域在所述半导体主体的横向方向上彼此间隔开,并且仅通过所述基极区域的一部分彼此分离。
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公开(公告)号:US20120098097A1
公开(公告)日:2012-04-26
申请号:US12908562
申请日:2010-10-20
IPC分类号: H01L27/082 , H01L27/06
CPC分类号: H01L29/7395 , H01L25/072 , H01L2924/0002 , H01L2924/00
摘要: An IGBT module is provided. The IGBT module has at least a first individual IGBT with a first softness during switching-off the IGBT module, and at least a second individual IGBT connected in parallel to the at least one first IGBT. The at least one second individual IGBT has a second softness during switching-off the IGBT module which is different than the first softness. Further a circuit and an electronic power device having two individual IGBTs, which are connected in parallel, are provided.
摘要翻译: 提供IGBT模块。 所述IGBT模块具有至少第一单独的IGBT,所述第一单独IGBT在关断所述IGBT模块期间具有第一柔性,以及至少第二独立IGBT并联连接至所述至少一个第一IGBT。 所述至少一个第二单独IGBT在关断IGBT模块期间具有与第一柔性不同的第二柔软度。 此外,提供了并联连接的具有两个单独的IGBT的电路和电子功率器件。
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