利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

30 条记录 (耗时 0.039 秒)

    Identifying Deterministic Performance Boost Capability of a Computer System
    1.
    发明申请
    Identifying Deterministic Performance Boost Capability of a Computer System 有权
    识别计算机系统的确定性性能提升能力

    公开(公告)号：US20100125436A1

    公开(公告)日：2010-05-20

    申请号：US12274534

    申请日：2008-11-20

    申请人： Harold W. Chase ,  Soraya Ghiasi ,  Michael Stephen Floyd ,  Joshua David Friedrich ,  Steven Paul Hartman ,  Norman Karl James ,  Malcolm Scott Ware ,  Richard L. Willaman

    发明人： Harold W. Chase ,  Soraya Ghiasi ,  Michael Stephen Floyd ,  Joshua David Friedrich ,  Steven Paul Hartman ,  Norman Karl James ,  Malcolm Scott Ware ,  Richard L. Willaman

    IPC分类号： G06F15/00

    CPC分类号： G06F11/24

    摘要： A benchmark tester retrieves a voltage margin that corresponds to a device that a system includes. The voltage margin indicates an additional amount of voltage to apply to a nominal voltage that, when added, results in the device operating at a power limit while executing a worst-case power workload. Next, the benchmark tester (or thermal power management device) sets an input voltage for the device to a value equal to the sum of the voltage margin and the nominal voltage. The benchmark tester then dynamically benchmark tests the system, which includes adjusting the device's frequency and input voltage while ensuring that the device does not exceed the device's power limit. In turn, the benchmark tester records a guaranteed minimum performance boost for the system based upon a result of the benchmark testing.

    摘要翻译： 基准测试仪检索与系统包括的设备相对应的电压裕度。 电压裕度表示额外的电压值，以适用于额定电压，当加入时，会导致器件在执行最坏情况下的工作负载时工作在功率极限。 接下来，基准测试器（或热功率管理器件）将器件的输入电压设置为等于电压裕度和额定电压之和的值。 基准测试仪然后动态基准测试系统，包括调整设备的频率和输入电压，同时确保设备不超过设备的功率限制。 反过来，基准测试人员会根据基准测试的结果记录系统的最低性能保证。

    Identifying deterministic performance boost capability of a computer system
    2.
    发明授权
    Identifying deterministic performance boost capability of a computer system 有权
    识别计算机系统的确定性性能提升能力

    公开(公告)号：US08055477B2

    公开(公告)日：2011-11-08

    申请号：US12274534

    申请日：2008-11-20

    申请人： Harold W. Chase ,  Soraya Ghiasi ,  Michael Stephen Floyd ,  Joshua David Friedrich ,  Steven Paul Hartman ,  Norman Karl James ,  Malcolm Scott Ware ,  Richard L. Willaman

    发明人： Harold W. Chase ,  Soraya Ghiasi ,  Michael Stephen Floyd ,  Joshua David Friedrich ,  Steven Paul Hartman ,  Norman Karl James ,  Malcolm Scott Ware ,  Richard L. Willaman

    IPC分类号： G06F15/00

    CPC分类号： G06F11/24

    摘要： A benchmark tester retrieves a voltage margin that corresponds to a device that a system includes. The voltage margin indicates an additional amount of voltage to apply to a nominal voltage that, when added, results in the device operating at a power limit while executing a worst-case power workload. Next, the benchmark tester (or thermal power management device) sets an input voltage for the device to a value equal to the sum of the voltage margin and the nominal voltage. The benchmark tester then dynamically benchmark tests the system, which includes adjusting the device's frequency and input voltage while ensuring that the device does not exceed the device's power limit. In turn, the benchmark tester records a guaranteed minimum performance boost for the system based upon a result of the benchmark testing.

    摘要翻译： 基准测试仪检索与系统包括的设备相对应的电压裕度。 电压裕度表示额外的电压值，以适用于额定电压，当加入时，会导致器件在执行最坏情况下的工作负载时工作在功率极限。 接下来，基准测试器（或热功率管理器件）将器件的输入电压设置为等于电压裕度和额定电压之和的值。 基准测试仪然后动态基准测试系统，包括调整设备的频率和输入电压，同时确保设备不超过设备的功率限制。 反过来，基准测试人员会根据基准测试的结果记录系统的最低性能保证。

    Dynamic Frequency And Voltage Scaling For A Computer Processor
    3.
    发明申请
    Dynamic Frequency And Voltage Scaling For A Computer Processor 审中-公开
    用于计算机处理器的动态频率和电压调节

    公开(公告)号：US20100094572A1

    公开(公告)日：2010-04-15

    申请号：US12251891

    申请日：2008-10-15

    申请人： Harold W. Chase ,  Joshua D. Friedrich ,  Soraya Ghiasi ,  Norman K. James ,  Jagat V. Pokala

    发明人： Harold W. Chase ,  Joshua D. Friedrich ,  Soraya Ghiasi ,  Norman K. James ,  Jagat V. Pokala

    IPC分类号： G06F19/00 ,  G06F1/26

    CPC分类号： G06F1/3203 ,  Y02D10/126

    摘要： Methods, apparatus, and computer program products are described for dynamic frequency and voltage scaling for a computer processor, including identifying during manufacture a nominal operating point of frequency and voltage for a computer processor, the nominal operating point including a nominal operating voltage identified for a design nominal operating frequency; determining, in dependence upon the nominal operating point, an operating range of frequency and voltage over which the computer processor is to function; and storing, in non-volatile storage on the computer processor during manufacture, information specifying the nominal operating point and the operating range.

    摘要翻译： 描述了用于计算机处理器的动态频率和电压缩放的方法，装置和计算机程序产品，包括在制造期间识别计算机处理器的频率和电压的标称工作点，标称工作点包括为 设计标称工作频率; 根据标称工作点确定计算机处理器将在其上工作的频率和电压的工作范围; 并且在制造期间在计算机处理器的非易失性存储器中存储指定标称工作点和操作范围的信息。

    Sensor Subset Selection for Reduced Bandwidth and Computation Requirements
    6.
    发明申请
    Sensor Subset Selection for Reduced Bandwidth and Computation Requirements 失效
    传感器子集选择降低带宽和计算要求

    公开(公告)号：US20090099817A1

    公开(公告)日：2009-04-16

    申请号：US12342054

    申请日：2008-12-22

    申请人： Andreas Bieswanger ,  Michael S. Floyd ,  Andrew J. Geissler ,  Soraya Ghiasi ,  Hye-Young McCreary ,  Guillermo J. Silva ,  Malcolm S. Ware

    发明人： Andreas Bieswanger ,  Michael S. Floyd ,  Andrew J. Geissler ,  Soraya Ghiasi ,  Hye-Young McCreary ,  Guillermo J. Silva ,  Malcolm S. Ware

    IPC分类号： G06F11/30

    CPC分类号： G06F11/30

    摘要： A system for identifying a subset of sensors to sample to reduce the frequency of sensor access. The system determines rise times and records values for the sensors in the system. A time criticality of the sensors is determined based on the rise times. The system processes the sensors by first creating sensor subsets based on one or more constraints on the sensors. The system monitors the values of the sensors in a sensor subset and flags a sensor when it makes a determination that, prior to a next scheduled sampling of the sensor subset, the value of a sensor in the monitored sensor subset will exceed a threshold constraint. The system moves those flagged sensors to a second sensor subset which complies with the sensor's constraints.

    摘要翻译： 用于识别要采样的传感器子集以减少传感器访问频率的系统。 系统确定系统中传感器的上升时间和记录值。 基于上升时间确定传感器的时间关键度。 该系统通过首先基于传感器上的一个或多个约束创建传感器子集来处理传感器。 系统监测传感器子集中的传感器的值，并且当传感器确定在传感器子集的下次调度采样之前，所述传感器子集中的传感器的值将超过阈值约束时，对传感器进行标记。 系统将标记的传感器移动到符合传感器约束的第二个传感器子集。

    WEIGHTED EVENT COUNTING SYSTEM AND METHOD FOR PROCESSOR PERFORMANCE MEASUREMENTS
    7.
    发明申请
    WEIGHTED EVENT COUNTING SYSTEM AND METHOD FOR PROCESSOR PERFORMANCE MEASUREMENTS 有权
    加权事件计数系统和处理器性能测量方法

    公开(公告)号：US20080133180A1

    公开(公告)日：2008-06-05

    申请号：US11951310

    申请日：2007-12-05

    申请人： Michael S. Floyd ,  Soraya Ghiasi ,  Thomas W. Keller ,  Karthick Rajamani ,  Freeman Leigh Rawson ,  Juan C. Rubio

    发明人： Michael S. Floyd ,  Soraya Ghiasi ,  Thomas W. Keller ,  Karthick Rajamani ,  Freeman Leigh Rawson ,  Juan C. Rubio

    IPC分类号： G06F11/34

    CPC分类号： G06F11/3466 ,  G06F11/348 ,  G06F2201/86 ,  G06F2201/88

    摘要： A weighted event counting system and method for processor performance measurements provides low latency and low error performance measurement capability. A weighted performance counter accumulates a performance count according to a plurality of event signals provided from functional units in the processor. Differing weights are applied to the event signals in according to the correlation between each event with processor performance. The weights may be provided from programmable registers, so that the weights can be adjusted under program control. The event signals may be combined to reduce the bit-width of the set of event signal, with mutually-exclusive events merged in single fields of the combinatorial result and events having the same weights merged according to a sub-total. The weights are applied to the combinatorial result and used to update a performance count. The performance count can then be used by power management software or hardware to make adjustments in operating parameters of the processor.

    摘要翻译： 用于处理器性能测量的加权事件计数系统和方法提供低延迟和低误差性能测量能力。 加权性能计数器根据从处理器中的功能单元提供的多个事件信号累加性能计数。 根据具有处理器性能的每个事件之间的相关性，将不同的权重应用于事件信号。 权重可以由可编程寄存器提供，从而可以在程序控制下调整权重。 事件信号可以被组合以减少事件信号集合的位宽，其中在组合结果的单个字段中合并相互排斥的事件和具有根据子总计合并的相同权重的事件。 权重应用于组合结果，用于更新性能计数。 电源管理软件或硬件可以使用性能计数来对处理器的运行参数进行调整。

    Method and System for Improving Processing Performance by Using Activity Factor Headroom
    8.
    发明申请
    Method and System for Improving Processing Performance by Using Activity Factor Headroom 失效
    通过使用活动因子净空来提高处理性能的方法和系统

    公开(公告)号：US20080082844A1

    公开(公告)日：2008-04-03

    申请号：US11538131

    申请日：2006-10-03

    申请人： Soraya Ghiasi ,  Thomas Walter Keller ,  Karthick Rajamani ,  Freeman Leigh Rawson ,  Juan C. Rubio

    发明人： Soraya Ghiasi ,  Thomas Walter Keller ,  Karthick Rajamani ,  Freeman Leigh Rawson ,  Juan C. Rubio

    IPC分类号： G06F1/00

    CPC分类号： G06F1/3203 ,  G06F1/329 ,  G06F11/3466 ,  G06F2201/88 ,  Y02D10/24 ,  Y02D10/34

    摘要： A method and system for improving processing performance by using activity factor headroom provides improved performance while meeting power management constraints in a processing system. The method and system estimate the power consumption of the system from a model that relates measured activities at a present operating point to power consumption for any available operating point of one or more processors in the system. The method then chooses the operating point(s) with the highest performance among the available operating points that will still meet budgetary constraints or specific thresholds of power consumption. The budgetary constraints or specific thresholds may be dynamically adjusted, and the method will update the operating point(s) to maintain safe operation and maximize performance. The method provides the best performance for the executing workload while ensuring safe operation.

    摘要翻译： 通过使用活动因素余量来提高处理性能的方法和系统在满足处理系统中的功率管理约束的同时提供了改进的性能。 该方法和系统从将系统中一个或多个处理器的任何可用操作点与当前操作点相关联的模型的模型估计系统的功耗。 然后，该方法在可用的操作点中选择具有最高性能的工作点，这些操作点仍将满足预算约束或功耗的特定阈值。 可以动态地调整预算限制或特定阈值，并且该方法将更新操作点以维持安全操作并使性能最大化。 该方法为执行工作负载提供最佳性能，同时确保安全操作。

    Sensor subset selection for reduced bandwidth and computation requirements
    9.
    发明授权
    Sensor subset selection for reduced bandwidth and computation requirements 失效
    用于降低带宽和计算要求的传感器子集选择

    公开(公告)号：US08032334B2

    公开(公告)日：2011-10-04

    申请号：US12342054

    申请日：2008-12-22

    申请人： Andreas Bieswanger ,  Michael S. Floyd ,  Andrew J. Geissler ,  Soraya Ghiasi ,  Hye-Young McCreary ,  Guillermo J. Silva ,  Malcolm S. Ware

    发明人： Andreas Bieswanger ,  Michael S. Floyd ,  Andrew J. Geissler ,  Soraya Ghiasi ,  Hye-Young McCreary ,  Guillermo J. Silva ,  Malcolm S. Ware

    IPC分类号： G06F11/00 ,  G06F19/00

    CPC分类号： G06F11/30

    摘要： A system for identifying a subset of sensors to sample to reduce the frequency of sensor access. The system determines rise times and records values for the sensors in the system. A time criticality of the sensors is determined based on the rise times. The system processes the sensors by first creating sensor subsets based on one or more constraints on the sensors. The system monitors the values of the sensors in a sensor subset and flags a sensor when it makes a determination that, prior to a next scheduled sampling of the sensor subset, the value of a sensor in the monitored sensor subset will exceed a threshold constraint. The system moves those flagged sensors to a second sensor subset which complies with the sensor's constraints.

    摘要翻译： 用于识别要采样的传感器子集以减少传感器访问频率的系统。 系统确定系统中传感器的上升时间和记录值。 基于上升时间确定传感器的时间关键度。 该系统通过首先基于传感器上的一个或多个约束创建传感器子集来处理传感器。 系统监测传感器子集中的传感器的值，并且当传感器确定在传感器子集的下次调度采样之前，所述传感器子集中的传感器的值将超过阈值约束时，对传感器进行标记。 系统将标记的传感器移动到符合传感器约束的第二个传感器子集。