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    FIRMWARE UPDATE OF AN INTERCONNECT DEVICE
    6.
    发明申请
    FIRMWARE UPDATE OF AN INTERCONNECT DEVICE 有权

    公开(公告)号：US20220326937A1

    公开(公告)日：2022-10-13

    申请号：US17809584

    申请日：2022-06-29

    Applicant: Hewlett Packard Enterprise Development LP

    Inventor： Robert Teisberg ,  David Koenen

    IPC: G06F8/65 ,  H04L41/082 ,  H04L67/00 ,  H04L69/14 ,  H04L45/00 ,  H04L67/145 ,  H04L45/28 ,  H04L69/40 ,  G06F13/16 ,  G06F13/40

    Abstract: An example device includes a processor; a first interface port forming a first datalink to a core network device via a first interconnect device; and a second interface port forming a second datalink to the core network device via a second interconnect device, the first and second datalinks being redundant connections of a link aggregation group (LAG) including a plurality of multiplexed connections within a single network media. The processor is to: remove the first interconnect device while maintaining the second datalink; update firmware of the first interconnect device upon receiving a first indication that the first interconnect device has stopped receiving or transmitting data; and reestablish the redundant connections of the first interconnect device upon receiving a second indication that the first interconnect device has been added back to the LAG. The first and second indications include indications of states in each connection of the multiplexed connections.

    Firmware update of an interconnect device
    7.
    发明授权
    Firmware update of an interconnect device 有权

    公开(公告)号：US11379208B2

    公开(公告)日：2022-07-05

    申请号：US15749032

    申请日：2015-07-30

    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

    Inventor： Robert Teisberg ,  David Koenen

    IPC: G06F8/65 ,  H04L41/082 ,  H04L67/00 ,  H04L69/14 ,  H04L45/00 ,  H04L67/145 ,  H04L45/28 ,  H04L69/40 ,  G06F13/16 ,  G06F13/40

    Abstract: An example device includes a processor; a first interface port forming a first datalink to a core network device via a first interconnect device; and a second interface port forming a second datalink to the core network device via a second interconnect device, the first and second datalinks being redundant connections of a link aggregation group (LAG) including a plurality of multiplexed connections within a single network media. The processor is to: remove the first interconnect device while maintaining the second datalink; update firmware of the first interconnect device upon receiving a first indication that the first interconnect device has stopped receiving or transmitting data; and reestablish the redundant connections of the first interconnect device upon receiving a second indication that the first interconnect device has been added back to the LAG. The first and second indications include indications of states in each connection of the multiplexed connections.

    Secure login information
    8.
    发明授权
    Secure login information 有权

    公开(公告)号：US10749858B2

    公开(公告)日：2020-08-18

    申请号：US15744515

    申请日：2015-09-04

    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

    Inventor： Alan Goodrum ,  Suhas Shivanna ,  David Koenen ,  Patrick Schoeller

    IPC: H04L29/06 ,  H04L29/08

    Abstract: An example device includes a processor coupled to a network and a memory coupled to the processor. The memory includes computer code for causing the processor to establish a secure connection between a manageability application and an interconnect device, the interconnect device being in communication with a newly connected networked device; and securely communicate, from the manageability application to the interconnect device, temporary login information for the networked device.

    FIRMWARE UPDATE OF AN INTERCONNECT DEVICE
    9.
    发明申请
    FIRMWARE UPDATE OF AN INTERCONNECT DEVICE 审中-公开

    公开(公告)号：US20180217833A1

    公开(公告)日：2018-08-02

    申请号：US15749032

    申请日：2015-07-30

    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

    Inventor： Robert Teisberg ,  David Koenen

    IPC: G06F8/65 ,  H04L29/08 ,  H04L12/24 ,  H04L29/06 ,  G06F13/40 ,  G06F13/16

    CPC classification number: G06F8/65 ,  G06F13/1673 ,  G06F13/4022 ,  H04L41/082 ,  H04L45/28 ,  H04L45/563 ,  H04L67/145 ,  H04L67/34 ,  H04L69/14 ,  H04L69/40 ,  Y02D50/30

    Abstract: An example device includes a processor; a first interface port forming a first datalink to a core network device via a first interconnect device; and a second interface port forming a second datalink to the core network device via a second interconnect device, the first and second datalinks being redundant connections of a link aggregation group (LAG) including a plurality of multiplexed connections within a single network media. The processor is to: remove the first interconnect device while maintaining the second datalink; update firmware of the first interconnect device upon receiving a first indication that the first interconnect device has stopped receiving or transmitting data; and reestablish the redundant connections of the first interconnect device upon receiving a second indication that the first interconnect device has been added back to the LAG. The first and second indications include indications of states in each connection of the multiplexed connections.

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