公开(公告)号：US06912015B1

公开(公告)日：2005-06-28

申请号：US09719397

申请日：1999-06-07

申请人： Hideyo Uwabata ,  Katsumi Terai ,  Minoru Miyata ,  Toshiaki Kitahara ,  Naoji Okumura ,  Kazuto Tanaka

发明人： Hideyo Uwabata ,  Katsumi Terai ,  Minoru Miyata ,  Toshiaki Kitahara ,  Naoji Okumura ,  Kazuto Tanaka

IPC分类号： G09G1/00 ,  H04N3/30 ,  H04N3/32 ,  H04N5/44

CPC分类号： H04N3/30 ,  H04N3/32

摘要： A parallel scanning circuit outputs a parallel scanning signal for making forward and backward scanning lines parallel. A vertical correlation detection circuit detects a portion where the change in luminance in the vertical direction exceeds a predetermined value on the basis of a luminance signal, and outputs a movement control signal representing the distance of movement on the screen of the scanning line. A retrace period reversion circuit reverses the lime axis of the movement control signal in a retrace period. A clamping circuit clamps the movement control signal to a predetermined DC voltage at the timing of horizontal synchronizing signal. A synthesizing circuit synthesizes the parallel scanning signal and the movement control signal, and feeds a synthesized signal as a vertical velocity modulation signal to a vertical velocity modulation coil.

摘要翻译： 并行扫描电路输出用于使前后扫描线平行的并行扫描信号。 垂直相关检测电路基于亮度信号检测垂直方向的亮度变化超过预定值的部分，并且在扫描线的屏幕上输出表示移动距离的移动控制信号。 回扫周期反转电路在回扫期间反转运动控制信号的石灰轴。 钳位电路在水平同步信号的定时将移动控制信号钳位到预定的DC电压。 合成电路合成并行扫描信号和移动控制信号，并将合成信号作为垂直速度调制信号馈送到垂直速度调制线圈。

公开(公告)号：US06529176B1

公开(公告)日：2003-03-04

申请号：US09673361

申请日：2000-10-16

申请人： Naoji Okumura ,  Hiroki Monta ,  Hideyo Uwabata ,  Yutaka Nio ,  Kazuto Tanaka ,  Yutaka Nishikawa

发明人： Naoji Okumura ,  Hiroki Monta ,  Hideyo Uwabata ,  Yutaka Nio ,  Kazuto Tanaka ,  Yutaka Nishikawa

IPC分类号： G09G108

CPC分类号： H04N5/44504 ,  H04N3/30 ,  H04N21/42653

摘要： A video signal processing circuit synthesizes a video signal and a graphic signal on the basis of a display switching control signal, inverts a synthesized signal on the time axis for each of a forward scanning period and a backward scanning period, and output a display signal. A speed modulating signal control circuit inverts the binarized display switching control signal on the time axis for each of the forward scanning period and the backward scanning period, expands the pulse width thereof, and feeds the display switching control signal to a speed modulating signal generating circuit. The speed modulating signal generating circuit subjects a display signal to first-order differentiation, inverts the polarity of a differentiated signal in the backward scanning signal, sets a portion, corresponding to the graphic signal, in the differentiated signal on the basis of the display switching control signal at a zero level, and generates a speed modulating signal.

摘要翻译： 视频信号处理电路根据显示切换控制信号合成视频信号和图形信号，在正向扫描期间和后退扫描周期中的每个正反转扫描期间对时间轴上的合成信号进行反转，并输出显示信号。 速度调制信号控制电路在正向扫描周期和反向扫描期间中的每一个上对时间轴上的二值化显示切换控制信号进行反转，扩大其脉冲宽度，并将显示切换控制信号馈送到速度调制信号发生电路 。 速度调制信号发生电路对显示信号进行一阶微分，使反向扫描信号中的微分信号的极性反转，根据显示切换在微分信号中设定与图形信号对应的部分 控制信号为零电平，并产生速度调制信号。

公开(公告)号：US06989872B2

公开(公告)日：2006-01-24

申请号：US10088106

申请日：2001-07-23

申请人： Masanori Nakatsuji ,  Masanobu Tanaka ,  Hideyo Uwabata ,  Naoji Okumura ,  Kazunori Yamate

发明人： Masanori Nakatsuji ,  Masanobu Tanaka ,  Hideyo Uwabata ,  Naoji Okumura ,  Kazunori Yamate

IPC分类号： H04N3/23

CPC分类号： H04N3/2335

摘要： A write PLL circuit generates a write clock signal for writing a video signal into a line memory. A readout PLL circuit generates a read clock signal for reading out the video signal stored in the line memory. An inner pincushion distortion correction voltage generation circuit modulates a correction waveform in the horizontal scanning period of time by a correction waveform in the vertical scanning period of time, to generate an inner pincushion distortion correction waveform, and adds a DC correction pulse to the inner pincushion distortion correction waveform and outputs the inner pincushion distortion correction waveform as an inner pincushion distortion correction voltage. A capacitive coupling circuit superimposes the inner pincushion distortion correction voltage on an output voltage of a loop filter of the readout PLL circuit, and feeds the inner pincushion distortion correction voltage to a VCO as a control voltage.

公开(公告)号：US06704056B2

公开(公告)日：2004-03-09

申请号：US09861587

申请日：2001-05-22

申请人： Toshiaki Kitahara ,  Hideyo Uwabata ,  Yutaka Nishikawa ,  Chikara Gotanda

发明人： Toshiaki Kitahara ,  Hideyo Uwabata ,  Yutaka Nishikawa ,  Chikara Gotanda

IPC分类号： H04N510

CPC分类号： H04N5/63 ,  H04N3/16

摘要： A video signal conversion part of a horizontal deflection circuit deletes a prescribed number of horizontal scanning lines from a vertical blanking interval of an input video signal and assigns a time corresponding to the deleted horizontal scanning lines to horizontal blanking intervals of the remaining horizontal scanning lines thereby extending the horizontal blanking interval of each horizontal scanning line and outputting a video signal. A synchronizing signal separation circuit extracts a horizontal synchronizing signal and a vertical synchronizing signal from the video signal output from the video signal conversion part. An output part of the horizontal deflection circuit supplies a sawtooth horizontal deflection current to a horizontal deflection yoke in synchronization with the horizontal synchronizing signal output from the synchronizing signal separation circuit.

摘要翻译： 水平偏转电路的视频信号转换部分从输入视频信号的垂直消隐间隔中删除规定数量的水平扫描线，并将与删除的水平扫描线对应的时间分配给其余水平扫描线的水平消隐间隔，由此 延长每条水平扫描线的水平消隐间隔并输出视频信号。 同步信号分离电路从视频信号转换部分输出的视频信号中提取水平同步信号和垂直同步信号。 水平偏转电路的输出部分与从同步信号分离电路输出的水平同步信号同步地向水平偏转线圈提供锯齿水平偏转电流。

公开(公告)号：US5982449A

公开(公告)日：1999-11-09

申请号：US780253

申请日：1997-01-08

申请人： Miho Nagai ,  Takashi Yamaguchi ,  Yutaka Nio ,  Hideto Nakahigashi ,  Hideyo Uwabata ,  Toshiaki Kitahara ,  Chikara Gotanda ,  Atsushi Ishizu

发明人： Miho Nagai ,  Takashi Yamaguchi ,  Yutaka Nio ,  Hideto Nakahigashi ,  Hideyo Uwabata ,  Toshiaki Kitahara ,  Chikara Gotanda ,  Atsushi Ishizu

IPC分类号： H04N3/27 ,  H04N3/32 ,  H04N5/20 ,  H04N5/202 ,  H04N5/44 ,  H04N5/445 ,  H04N5/46 ,  H04N5/14

CPC分类号： H04N5/20 ,  H04N3/27 ,  H04N3/32 ,  H04N5/44 ,  H04N5/202 ,  H04N5/445 ,  H04N5/46

摘要： A television receiver comprising an information extracting circuit for extracting information from a format or content of an input video signal, a video signal processing circuit for processing this video signal by a program or data, a memory for storing the program and data, a CPU for controlling, operating or driving these elements, and a display device for displaying an image. The video signal processing circuit can, under the control of the CPU, decode the signal, correct or set the picture quality such as gradation and sharpness, or adaptively process an on-screen display based on the input video signal. The television receiver is also able to adaptively extend the functions of the television receiver corresponding to various signal formats.

摘要翻译： 一种电视接收机，包括：用于从输入视频信号的格式或内容中提取信息的信息提取电路，用于通过程序或数据处理该视频信号的视频信号处理电路，用于存储程序和数据的存储器，用于存储程序和数据的存储器 控制，操作或驱动这些元件，以及用于显示图像的显示装置。 视频信号处理电路可以在CPU的控制下对信号进行解码，校正或设置诸如灰度和清晰度的图像质量，或者基于输入视频信号自适应地处理屏幕显示。 电视接收机还能够自适应地扩展对应于各种信号格式的电视接收机的功能。

公开(公告)号：US06211918B1

公开(公告)日：2001-04-03

申请号：US08900377

申请日：1997-07-11

申请人： Hideyo Uwabata ,  Minoru Miyata

发明人： Hideyo Uwabata ,  Minoru Miyata

IPC分类号： H04N701

CPC分类号： H04N7/0122 ,  H04N5/46 ,  H04N7/0105 ,  H04N7/012 ,  H04N9/641 ,  H04N9/642

摘要： A video signal converter converts a video signal to a required form. The required form of the signal is the display format for displaying the signal. The input signal is converted to a digital signal and stored in a memory using the output of a first clock pulse generator synchronized to the horizontal synchronizing signal of the input signal. The digital signal is read out from the memory using the output of a second clock pulse generator synchronized to the vertical synchronizing signal of the input signal from a position specified by the controller. The output digital signal is then reconverted to an analog signal.

摘要翻译： 视频信号转换器将视频信号转换成所需形式。 信号的所需形式是显示信号的显示格式。 输入信号被转换为数字信号，并使用与输入信号的水平同步信号同步的第一时钟脉冲发生器的输出来存储在存储器中。 使用与由控制器指定的位置的输入信号的垂直同步信号同步的第二时钟脉冲发生器的输出，从存储器读出数字信号。 然后将输出数字信号转换为模拟信号。

公开(公告)号：US06534920B1

公开(公告)日：2003-03-18

申请号：US09887091

申请日：2001-06-25

申请人： Hideyo Uwabata ,  Masanobu Tanaka

发明人： Hideyo Uwabata ,  Masanobu Tanaka

IPC分类号： H01V2998

CPC分类号： H04N5/23203 ,  G09G1/04

摘要： An amplitude control circuit controls the amplitude of a correction signal periodically changing in a parabolic form at vertical scanning intervals based on the level of an amplitude control signal and applies an amplitude controlled output signal to an adder. The adder adds the amplitude controlled correction signal to the output signal of a low-pass filter and applies the resulting signal to a retrace scanning control circuit and a trace scanning control circuit. The retrace scanning control circuit and the trace scanning control circuit apply a gate pulse to horizontal output FETs.

摘要翻译： 幅度控制电路基于幅度控制信号的电平，以垂直扫描间隔控制以抛物线形式周期性变化的校正信号的幅度，并将幅度受控输出信号施加到加法器。 加法器将幅度控制校正信号加到低通滤波器的输出信号上，并将得到的信号施加到回扫扫描控制电路和跟踪扫描控制电路。 回扫扫描控制电路和跟踪扫描控制电路将栅极脉冲施加到水平输出FET。

公开(公告)号：US5103295A

公开(公告)日：1992-04-07

申请号：US513813

申请日：1990-04-25

申请人： Hideyo Uwabata ,  Yoshio Yasumoto ,  Sadashi Kageyama ,  Shuji Inoue ,  Yoshio Abe

发明人： Hideyo Uwabata ,  Yoshio Yasumoto ,  Sadashi Kageyama ,  Shuji Inoue ,  Yoshio Abe

IPC分类号： H04N19/00 ,  H04N7/015 ,  H04N7/08 ,  H04N7/081 ,  H04N9/77 ,  H04N9/78 ,  H04N11/04 ,  H04N19/423 ,  H04N19/587 ,  H04N19/59 ,  H04N19/80

CPC分类号： H04N7/0122 ,  H04N9/78

摘要： A main signal motion detection signal and a multiplex motion detection signal are processed to obtain a compensated motion detection signal. This signal is a motion detection signal for a portion other than a portion having an aspect ratio of 4:3. Thus, a television signal processor is provided which eliminates quality differences between images in the portion having an aspect ratio of 4:3 and images in the other portion having a different aspect ratio.

公开(公告)号：US4985769A

公开(公告)日：1991-01-15

申请号：US174452

申请日：1988-03-23

申请人： Yoshio Yasumoto ,  Sadashi Kageyama ,  Shuji Inoue ,  Yoshio Abe ,  Hideyo Uwabata

发明人： Yoshio Yasumoto ,  Sadashi Kageyama ,  Shuji Inoue ,  Yoshio Abe ,  Hideyo Uwabata

IPC分类号： H04N7/08 ,  H04N11/24

CPC分类号： H04N11/008 ,  H04N7/08

摘要： Disclosed are multiplex television signal processing apparatuses in a television signal transmitting and receiving system. An apparatus at the transmitting side comprises: a signal separator to separate a multiplex signal into a first and a second part; a time-multiplexer to time-multiplex a main television signal and the first part of the multiplex signal to obtain a time-multiplexed main signal; a first amplitude-modulator for modulating a first carrier by the multiplexed main signal to obtain a vestigial side band signal, amplitude-modulated main signal; a second amplitude-modulator for modulating a second carrier which is same in frequency as but different in phase by 90 degrees from the first carrier by a second multiplex signal; an inverse Nyquist filter for filtering this signal to obtain a vestigial side band, amplitude-modulated multiplex signal; and an adder for adding the vestigial side band, amplitude-modulated main and multiplex signals to obtain a multiplexed signal.An apparatus at the receiving side comprises: a Nyquist filter for filtering the multiplexed signal; a carrier regenerator for regenerating the first and second carriers from the multiplexed signal; a main signal detector for detecting the main signal from the multiplexed signal passed through the Nyquist filter by using the first carrier; a filter for removing quadrature distortion from the multiplexed signal; a multiplex signal detector for detecting the first multiplex signal from the multiplexed signal passed through the filter by using the second carrier; a time-demultiplexer to time-demultiplexing the main signal into a main television signal and a second multiplex signal; and a signal composer for composing the first and second multiplex signal to obtain the original multiplex signal.

摘要翻译： 公开了一种电视信号发送和接收系统中的多路复用电视信号处理装置。 在发送侧的装置包括：信号分离器，用于将多路复用信号分离成第一和第二部分; 时分复用器，用于时分复用主电视信号和多路复用信号的第一部分，以获得时分复用的主信号; 第一幅度调制器，用于通过所复用的主信号调制第一载波，以获得残留边带信号，幅度调制主信号; 第二幅度调制器，用于通过第二多路复用信号调制与第一载波频率相同但相位相差90度的第二载波; 逆奈奎斯特滤波器，用于对该信号进行滤波以获得残留边带，调幅多路复用信号; 以及用于将残留边带，幅度调制的主复用信号和多路复用信号相加以获得复用信号的加法器。 接收侧的装置包括：奈奎斯特滤波器，用于对复用的信号进行滤波; 载波再生器，用于从多路复用信号再生第一和第二载波; 主信号检测器，用于通过使用第一载波从经过奈奎斯特滤波器的复用信号中检测主信号; 滤波器，用于从多路复用信号中去除正交失真; 多路复用信号检测器，用于通过使用第二载波从经过滤波器的复用信号中检测第一多路复用信号; 时分解复用器，将主信号时分解复用成主电视信号和第二多路复用信号; 以及用于构成第一和第二多路复用信号以获得原始多路复用信号的信号编组器。

公开(公告)号：US5142353A

公开(公告)日：1992-08-25

申请号：US685164

申请日：1991-04-12

申请人： Sadashi Kageyama ,  Yoshio Abe ,  Yoshio Yasumoto ,  Shuji Inoue ,  Hideyo Uwabata

发明人： Sadashi Kageyama ,  Yoshio Abe ,  Yoshio Yasumoto ,  Shuji Inoue ,  Hideyo Uwabata

IPC分类号： H04N11/24

CPC分类号： H04N11/008

摘要： A television signal processor which is compatible with the existing television systems and is capable of producing television signals having a larger aspect ratio than the standard aspect ratio has an arrangement such that, at the transmission side, a main signal and a multiplex signal are produced from an electrical signal obtained by receiving an original image through processes such as time-axis compression, time-axis expansion, and chrominance signal processing, and are subjected to non-time-axis multiplexing. The processor has a further arrangement such that, at the reception side, there are provided a circuit for separating the non-time-axis multiplexed signal, a circuit for separating a luminance signal and a chrominance signal, a circuit for demodulating the chrominance signal, a circuit for effecting time-axis compression, a circuit for time-axis expanding the time-axis multiplexed signal, and a circuit for time-axis compressing the non-time-axis multiplexed signal. A receiver provided with this processor may receive images broadcast under the existing television systems without troubles and also may reproduce TV images with a larger aspect ratio than the conventional 4:3 aspect ratio by the application of synchronous detection, time-axis compression, time-axis expansion, etc.

摘要翻译： 与现有电视系统兼容并且能够产生具有比标准宽高比更大的纵横比的电视信号的电视信号处理器具有以下结构：在发送侧，主信号和多路信号由 通过诸如时间轴压缩，时间轴扩展和色度信号处理的处理接收原始图像而获得的电信号，并且进行非时间轴多路复用。 该处理器具有另外的结构，即在接收侧设置有用于分离非时间轴多路复用信号的电路，用于分离亮度信号和色度信号的电路，用于解调色度信号的电路， 用于实现时间轴压缩的电路，用于时间轴扩展时间轴多路复用信号的电路，以及用于时间轴压缩非时间轴多路复用信号的电路。 设置有该处理器的接收机可以在现有的电视系统下接收图像而无需麻烦，并且还可以通过应用同步检测，时间轴压缩，时间轴压缩，再现具有比传统的4：3宽高比更大的宽高比的TV图像。 轴扩展等