利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

115 条记录 (耗时 0.033 秒)

    SEMICONDUCTOR DEVICE
    1.
    发明申请
    SEMICONDUCTOR DEVICE 失效
    半导体器件

    公开(公告)号：US20060102941A1

    公开(公告)日：2006-05-18

    申请号：US10986060

    申请日：2004-11-12

    申请人： Hiroshi Itokawa ,  Koji Yamakawa ,  Tohru Ozaki ,  Yoshinori Kumura ,  Takamichi Tsuchiya ,  Nicolas Nagel ,  Bum-Ki Moon ,  Andreas Hilliger

    发明人： Hiroshi Itokawa ,  Koji Yamakawa ,  Tohru Ozaki ,  Yoshinori Kumura ,  Takamichi Tsuchiya ,  Nicolas Nagel ,  Bum-Ki Moon ,  Andreas Hilliger

    IPC分类号： H01L29/94

    CPC分类号： H01L28/55 ,  G11C11/22 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/65

    摘要： Disclosed is a semiconductor device comprising a semiconductor substrate, a capacitor provided above the semiconductor substrate and including a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode, the bottom electrode comprising a first conductive film containing iridium, a second conductive film provided between the dielectric film and the first conductive film and formed of a noble metal film, a third conductive film provided between the dielectric film and the second conductive film and formed of a metal oxide film having a perovskite structure, and a diffusion prevention film provided between the first conductive film and the second conductive film and including at least one of a metal film and a metal oxide film, the diffusion prevention film preventing diffusion of iridium contained in the first conductive film.

    摘要翻译： 公开了一种半导体器件，包括半导体衬底，设置在半导体衬底上方并包括底电极，顶电极和设置在底电极和顶电极之间的电介质膜的电容器，底电极包括含有 铱，设置在电介质膜和第一导电膜之间并由贵金属膜形成的第二导电膜，设置在电介质膜和第二导电膜之间并由具有钙钛矿结构的金属氧化物膜形成的第三导电膜， 以及设置在所述第一导电膜和所述第二导电膜之间并且包括金属膜和金属氧化物膜中的至少一种的防扩散膜，所述扩散防止膜防止包含在所述第一导电膜中的铱的扩散。

    Semiconductor device
    2.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US07042037B1

    公开(公告)日：2006-05-09

    申请号：US10986060

    申请日：2004-11-12

    申请人： Hiroshi Itokawa ,  Koji Yamakawa ,  Tohru Ozaki ,  Yoshinori Kumura ,  Takamichi Tsuchiya ,  Nicolas Nagel ,  Bum-Ki Moon ,  Andreas Hilliger

    发明人： Hiroshi Itokawa ,  Koji Yamakawa ,  Tohru Ozaki ,  Yoshinori Kumura ,  Takamichi Tsuchiya ,  Nicolas Nagel ,  Bum-Ki Moon ,  Andreas Hilliger

    IPC分类号： H01L31/062

    CPC分类号： H01L28/55 ,  G11C11/22 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/65

    摘要： Disclosed is a semiconductor device comprising a semiconductor substrate, a capacitor provided above the semiconductor substrate and including a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode, the bottom electrode comprising a first conductive film containing iridium, a second conductive film provided between the dielectric film and the first conductive film and formed of a noble metal film, a third conductive film provided between the dielectric film and the second conductive film and formed of a metal oxide film having a perovskite structure, and a diffusion prevention film provided between the first conductive film and the second conductive film and including at least one of a metal film and a metal oxide film, the diffusion prevention film preventing diffusion of iridium contained in the first conductive film.

    摘要翻译： 公开了一种半导体器件，包括半导体衬底，设置在半导体衬底上方并包括底电极，顶电极和设置在底电极和顶电极之间的电介质膜的电容器，底电极包括含有 铱，设置在电介质膜和第一导电膜之间并由贵金属膜形成的第二导电膜，设置在电介质膜和第二导电膜之间并由具有钙钛矿结构的金属氧化物膜形成的第三导电膜， 以及设置在所述第一导电膜和所述第二导电膜之间并且包括金属膜和金属氧化物膜中的至少一种的防扩散膜，所述扩散防止膜防止包含在所述第一导电膜中的铱的扩散。

    Barrier stack with improved barrier properties
    3.
    发明授权
    Barrier stack with improved barrier properties 失效
    阻隔层具有改善的阻隔性能

    公开(公告)号：US07009230B2

    公开(公告)日：2006-03-07

    申请号：US10604323

    申请日：2003-07-10

    申请人： Bum Ki Moon ,  Gerhard Beitel ,  Nicolas Nagel ,  Andreas Hilliger ,  Koji Yamakawa ,  Keitaro Imai

    发明人： Bum Ki Moon ,  Gerhard Beitel ,  Nicolas Nagel ,  Andreas Hilliger ,  Koji Yamakawa ,  Keitaro Imai

    IPC分类号： H01L29/76

    CPC分类号： H01L27/11502 ,  H01L21/28568 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/75

    摘要： An improved barrier stack for inhibiting diffusion of atoms or molecules, such as O2 is disclosed. The barrier stack is particularly useful in capacitor over plug structures to prevent plug oxidation which can adversely impact the reliability of the structures. The barrier stack includes first and second barrier layers. In one embodiment, the first barrier layer comprises first and second sub-barrier layers having mismatched grain boundaries. The sub-barrier layers are selected from, for example, Ir, Ru, Pd, Rh, or alloys thereof. By providing mismatched grain boundaries, the interface of the sub-barrier layers block the diffusion path of oxygen. To further enhance the barrier properties, the first barrier layer is passivated with O2 using, for example, a rapid thermal oxidation. The RTO forms a thin oxide layer on the surface of the first barrier layer. The oxide layer can advantageously promote mismatching of the grain boundaries of the first and second sub-barrier layer. The second barrier layer comprises a conductive oxide.

    摘要翻译： 公开了用于抑制原子或分子扩散的改进的阻挡层，例如O 2。 势垒堆叠在电容器超过插塞结构中特别有用，以防止插塞氧化，这可能不利地影响结构的可靠性。 阻挡层包括第一和第二阻挡层。 在一个实施例中，第一阻挡层包括具有失配的晶界的第一和第二子阻挡层。 亚阻挡层选自例如Ir，Ru，Pd，Rh或其合金。 通过提供错配的晶界，子阻挡层的界面阻挡氧的扩散路径。 为了进一步增强阻挡性能，使用例如快速热氧化，第一阻挡层用O 2 2钝化。 RTO在第一阻挡层的表面上形成薄的氧化物层。 氧化物层可以有利地促进第一和第二子阻挡层的晶界的失配。 第二阻挡层包括导电氧化物。

    Barrier stack with improved barrier properties
    4.
    发明授权
    Barrier stack with improved barrier properties 有权
    阻隔层具有改善的阻隔性能

    公开(公告)号：US06787831B2

    公开(公告)日：2004-09-07

    申请号：US10050246

    申请日：2002-01-15

    申请人： Bum Ki Moon ,  Gerhard Adolf Beitel ,  Nicolas Nagel ,  Andreas Hilliger ,  Koji Yamakawa ,  Keitaro Imai

    发明人： Bum Ki Moon ,  Gerhard Adolf Beitel ,  Nicolas Nagel ,  Andreas Hilliger ,  Koji Yamakawa ,  Keitaro Imai

    IPC分类号： H01L27108

    CPC分类号： H01L27/11502 ,  H01L21/28568 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/75

    摘要： An barrier stack for inhibiting diffusion of atoms or molecules, such as O2 is disclosed. The barrier slack includes first and second barrier layers formed from, for example, Ir, Ru, Pd, Rh, or alloys thereof. The first barrier layer is passivated with O2 using, for example, a rapid thermal oxidation (RTO) prior to formation of the second barrier layer. The RTO forms a thin oxide layer on the surface of the first barrier layer. The thin oxide layer passivates the grain boundaries of the first barrier layer as well as promoting mismatching of the grain boundaries of the first and second barrier layer.

    摘要翻译： 公开了用于抑制诸如O 2的原子或分子扩散的阻挡层。 阻挡松弛包括由例如Ir，Ru，Pd，Rh或其合金形成的第一和第二阻挡层。 在形成第二阻挡层之前，使用例如快速热氧化（RTO）将第一阻挡层用O 2钝化。 RTO在第一阻挡层的表面上形成薄的氧化物层。 薄氧化物层钝化第一阻挡层的晶界，并促进第一和第二阻挡层的晶界的不匹配。

    SEMICONDUCTOR DEVICE
    5.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号：US20080160642A1

    公开(公告)日：2008-07-03

    申请号：US12046229

    申请日：2008-03-11

    申请人： Hiroshi Itokawa ,  Keitaro Imai ,  Koji Yamakawa ,  Bum-ki Moon

    发明人： Hiroshi Itokawa ,  Keitaro Imai ,  Koji Yamakawa ,  Bum-ki Moon

    IPC分类号： H01L21/8234

    CPC分类号： H01L27/11507 ,  H01L27/11502 ,  H01L28/55 ,  H01L28/65 ,  H01L28/91

    摘要： A semiconductor device according to an aspect of the invention comprises a semiconductor substrate, a conductive plug which is connected to an active region of a transistor formed on the semiconductor substrate, a metal silicide film which covers a bottom surface portion and side surface portion of the conductive plug, and an electrode structure which is formed on the conductive plug.

    摘要翻译： 根据本发明的一个方面的半导体器件包括半导体衬底，连接到形成在半导体衬底上的晶体管的有源区的导电插塞，覆盖半导体衬底的底表面部分和侧表面部分的金属硅化物膜 导电插头和形成在导电插头上的电极结构。

    Semiconductor device
    6.
    发明申请
    Semiconductor device 审中-公开
    半导体器件

    公开(公告)号：US20060214210A1

    公开(公告)日：2006-09-28

    申请号：US11097288

    申请日：2005-04-04

    申请人： Hiroshi Itokawa ,  Keitaro Imai ,  Koji Yamakawa ,  Bum-ki Moon

    发明人： Hiroshi Itokawa ,  Keitaro Imai ,  Koji Yamakawa ,  Bum-ki Moon

    IPC分类号： H01L29/94

    CPC分类号： H01L27/11507 ,  H01L27/11502 ,  H01L28/55 ,  H01L28/65 ,  H01L28/91

    摘要： A semiconductor device according to an aspect of the invention comprises a semiconductor substrate, a conductive plug which is connected to an active region of a transistor formed on the semiconductor substrate, a metal silicide film which covers a bottom surface portion and side surface portion of the conductive plug, and an electrode structure which is formed on the conductive plug.

    摘要翻译： 根据本发明的一个方面的半导体器件包括半导体衬底，连接到形成在半导体衬底上的晶体管的有源区的导电插塞，覆盖半导体衬底的底表面部分和侧表面部分的金属硅化物膜 导电插头和形成在导电插头上的电极结构。

    Semiconductor device with perovskite capacitor
    7.
    发明授权
    Semiconductor device with perovskite capacitor 失效
    具有钙钛矿电容器的半导体器件

    公开(公告)号：US06924519B2

    公开(公告)日：2005-08-02

    申请号：US10427962

    申请日：2003-05-02

    申请人： Hiroshi Itokawa ,  Koji Yamakawa ,  Keitaro Imai ,  Katsuaki Natori ,  Bum-ki Moon

    发明人： Hiroshi Itokawa ,  Koji Yamakawa ,  Keitaro Imai ,  Katsuaki Natori ,  Bum-ki Moon

    IPC分类号： H01L21/02 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

    CPC分类号： H01L28/65 ,  H01L28/55 ,  H01L28/75

    摘要： There is disclosed a semiconductor device comprising a semiconductor substrate, and a capacitor provided above the semiconductor substrate and comprising a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode, at least one of the bottom electrode and the top electrode comprising a conductive film selected from a noble metal film and a noble metal oxide film, a metal oxide film having a perovskite structure, provided between the dielectric film and the conductive film, represented by ABO3, and containing a first metal element as a B site element, and a metal film provided between the conductive film and the metal oxide film, and containing a second metal element which is a B site element of a metal oxide having a perovskite structure, a decrease of Gibbs free energy at a time when the second metal element forms an oxide being larger than that at a time when the first metal element forms an oxide.

    摘要翻译： 公开了一种半导体器件，包括半导体衬底和设置在半导体衬底之上的电容器，包括设置在底部电极和顶部电极之间的底部电极，顶部电极和电介质膜，至少一个底部电极 并且包括由贵金属膜和贵金属氧化物膜选择的导电膜的顶部电极，设置在电介质膜和导电膜之间的具有钙钛矿结构的金属氧化物膜，由ABO 3 并且含有作为B位元素的第一金属元素和设置在导电膜和金属氧化物膜之间的金属膜，并且含有作为具有钙钛矿结构的金属氧化物的B位元素的第二金属元素， 当第二金属元素形成比第一金属元素形成氧化物时的氧化物大的氧化物时，吉布斯自由能的降低。