利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

50 条记录 (耗时 0.027 秒)

    SEMICONDUCTOR DEVICE
    3.
    发明申请
    SEMICONDUCTOR DEVICE 失效
    半导体器件

    公开(公告)号：US20060102941A1

    公开(公告)日：2006-05-18

    申请号：US10986060

    申请日：2004-11-12

    申请人： Hiroshi Itokawa ,  Koji Yamakawa ,  Tohru Ozaki ,  Yoshinori Kumura ,  Takamichi Tsuchiya ,  Nicolas Nagel ,  Bum-Ki Moon ,  Andreas Hilliger

    发明人： Hiroshi Itokawa ,  Koji Yamakawa ,  Tohru Ozaki ,  Yoshinori Kumura ,  Takamichi Tsuchiya ,  Nicolas Nagel ,  Bum-Ki Moon ,  Andreas Hilliger

    IPC分类号： H01L29/94

    CPC分类号： H01L28/55 ,  G11C11/22 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/65

    摘要： Disclosed is a semiconductor device comprising a semiconductor substrate, a capacitor provided above the semiconductor substrate and including a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode, the bottom electrode comprising a first conductive film containing iridium, a second conductive film provided between the dielectric film and the first conductive film and formed of a noble metal film, a third conductive film provided between the dielectric film and the second conductive film and formed of a metal oxide film having a perovskite structure, and a diffusion prevention film provided between the first conductive film and the second conductive film and including at least one of a metal film and a metal oxide film, the diffusion prevention film preventing diffusion of iridium contained in the first conductive film.

    摘要翻译： 公开了一种半导体器件，包括半导体衬底，设置在半导体衬底上方并包括底电极，顶电极和设置在底电极和顶电极之间的电介质膜的电容器，底电极包括含有 铱，设置在电介质膜和第一导电膜之间并由贵金属膜形成的第二导电膜，设置在电介质膜和第二导电膜之间并由具有钙钛矿结构的金属氧化物膜形成的第三导电膜， 以及设置在所述第一导电膜和所述第二导电膜之间并且包括金属膜和金属氧化物膜中的至少一种的防扩散膜，所述扩散防止膜防止包含在所述第一导电膜中的铱的扩散。

    Semiconductor device
    4.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US07042037B1

    公开(公告)日：2006-05-09

    申请号：US10986060

    申请日：2004-11-12

    申请人： Hiroshi Itokawa ,  Koji Yamakawa ,  Tohru Ozaki ,  Yoshinori Kumura ,  Takamichi Tsuchiya ,  Nicolas Nagel ,  Bum-Ki Moon ,  Andreas Hilliger

    发明人： Hiroshi Itokawa ,  Koji Yamakawa ,  Tohru Ozaki ,  Yoshinori Kumura ,  Takamichi Tsuchiya ,  Nicolas Nagel ,  Bum-Ki Moon ,  Andreas Hilliger

    IPC分类号： H01L31/062

    CPC分类号： H01L28/55 ,  G11C11/22 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/65

    摘要： Disclosed is a semiconductor device comprising a semiconductor substrate, a capacitor provided above the semiconductor substrate and including a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode, the bottom electrode comprising a first conductive film containing iridium, a second conductive film provided between the dielectric film and the first conductive film and formed of a noble metal film, a third conductive film provided between the dielectric film and the second conductive film and formed of a metal oxide film having a perovskite structure, and a diffusion prevention film provided between the first conductive film and the second conductive film and including at least one of a metal film and a metal oxide film, the diffusion prevention film preventing diffusion of iridium contained in the first conductive film.

    摘要翻译： 公开了一种半导体器件，包括半导体衬底，设置在半导体衬底上方并包括底电极，顶电极和设置在底电极和顶电极之间的电介质膜的电容器，底电极包括含有 铱，设置在电介质膜和第一导电膜之间并由贵金属膜形成的第二导电膜，设置在电介质膜和第二导电膜之间并由具有钙钛矿结构的金属氧化物膜形成的第三导电膜， 以及设置在所述第一导电膜和所述第二导电膜之间并且包括金属膜和金属氧化物膜中的至少一种的防扩散膜，所述扩散防止膜防止包含在所述第一导电膜中的铱的扩散。

    Semiconductor device and mask pattern
    7.
    发明授权
    Semiconductor device and mask pattern 失效
    半导体器件和掩模图案

    公开(公告)号：US07504680B2

    公开(公告)日：2009-03-17

    申请号：US11107750

    申请日：2005-04-18

    申请人： Osamu Arisumi ,  Yoshinori Kumura ,  Kazuhiro Tomioka ,  Ulrich Egger ,  Haoran Zhuang ,  Bum-ki Moon

    发明人： Osamu Arisumi ,  Yoshinori Kumura ,  Kazuhiro Tomioka ,  Ulrich Egger ,  Haoran Zhuang ,  Bum-ki Moon

    IPC分类号： H01L31/062 ,  H01L31/113

    CPC分类号： H01L28/55 ,  H01L28/65

    摘要： A semiconductor device according to an aspect of the invention includes a semiconductor substrate, and a capacitor that is provided above the semiconductor substrate and is configured such that a dielectric film is sandwiched between a lower electrode and an upper electrode, the dielectric film being formed of an ABO3 perovskite-type oxide that includes at least one of Pb, Ba and Sr as an A-site element and at least one of Zr, Ti, Ta, Nb, Mg, W, Fe and Co as a B-site element, wherein a radius of curvature of a sidewall of the capacitor, when viewed from above or in a film thickness direction, is 250 [nm] or less, and a length of an arc with the radius of curvature is {250 [nm]×π/6 [rad]} or less.

    摘要翻译： 根据本发明的一个方面的半导体器件包括半导体衬底和电容器，其设置在半导体衬底之上并且被构造为使得电介质膜夹在下电极和上电极之间，电介质膜由 包含作为A位元素的Pb，Ba和Sr中的至少一种和作为B位元素的Zr，Ti，Ta，Nb，Mg，W，Fe和Co中的至少一种的ABO 3钙钛矿型氧化物， 其中，当从上方或者膜厚方向观察时，电容器的侧壁的曲率半径为250 [nm]以下，曲率半径的弧长为{250 [nm]×ppi / 6 [rad]}以下。

    Semiconductor device and mask pattern
    8.
    发明申请
    Semiconductor device and mask pattern 失效
    半导体器件和掩模图案

    公开(公告)号：US20060231876A1

    公开(公告)日：2006-10-19

    申请号：US11107750

    申请日：2005-04-18

    申请人： Osamu Arisumi ,  Yoshinori Kumura ,  Kazuhiro Tomioka ,  Ulrich Egger ,  Haoran Zhuang ,  Bum-ki Moon

    发明人： Osamu Arisumi ,  Yoshinori Kumura ,  Kazuhiro Tomioka ,  Ulrich Egger ,  Haoran Zhuang ,  Bum-ki Moon

    IPC分类号： H01L29/00

    CPC分类号： H01L28/55 ,  H01L28/65

    摘要： A semiconductor device according to an aspect of the invention comprises a semiconductor substrate, and a capacitor that is provided above the semiconductor substrate and is configured such that a dielectric film is sandwiched between a lower electrode and an upper electrode, the dielectric film being formed of an ABO3 perovskite-type oxide that includes at least one of Pb, Ba and Sr as an A-site element and at least one of Zr, Ti, Ta, Nb, Mg, W, Fe and Co as a B-site element, wherein a radius of curvature of a side wall of the capacitor, when viewed from above or in a film thickness direction, is 250 [nm] or less, and a length of an arc with the radius of curvature is {250 [nm]×π/6 [rad]} or more.

    摘要翻译： 根据本发明的一个方面的半导体器件包括半导体衬底和电容器，其设置在半导体衬底之上并且被构造为使得电介质膜夹在下电极和上电极之间，电介质膜由 包含作为A位元素的Pb，Ba和Sr中的至少一种和Zr，Ti，Ta，Nb，Mg，W，Fe中的至少一种的ABO 3钙钛矿型氧化物，和 Co作为B位元素，其中当从上方或膜厚方向观察时，电容器的侧壁的曲率半径为250 [nm]以下，并且具有半径为 曲率为{250 [nm] xpi / 6 [rad]}以上。

    Semiconductor device having ferroelectric capacitor and method for manufacturing the same
    9.
    发明授权
    Semiconductor device having ferroelectric capacitor and method for manufacturing the same 失效
    具有铁电电容器的半导体器件及其制造方法

    公开(公告)号：US06762065B2

    公开(公告)日：2004-07-13

    申请号：US10448359

    申请日：2003-05-30

    申请人： Hiroyuki Kanaya ,  Yasuyuki Taniguchi ,  Tohru Ozaki ,  Yoshinori Kumura

    发明人： Hiroyuki Kanaya ,  Yasuyuki Taniguchi ,  Tohru Ozaki ,  Yoshinori Kumura

    IPC分类号： H01L2100

    CPC分类号： H01L27/11502 ,  H01L21/31116 ,  H01L21/32136 ,  H01L27/11507 ,  H01L28/56 ,  H01L28/75

    摘要： A lower electrode is formed on an insulating film on a semiconductor substrate. A pair of ferroelectric films are formed on the lower electrode separately from each other. An upper electrode is formed on each of the pair of ferroelectric films. A portion of the lower electrode on which the ferroelectric film is formed is thicker than a portion thereof on which the ferroelectric film is not formed. Such a structure is obtained by sequentially depositing the lower electrode, the ferroelectric film, and the upper electrode on the insulating film, forming a mask on the upper-electrode, using this mask to etch the upper-electrode and the ferroelectric film to thereby pattern a pair of upper electrodes and a pair of ferroelectric electrodes, forming such a mask that continuously covers the pair of upper electrodes and the pair of ferroelectric films, and then etching the lower-electrode material film.

    摘要翻译： 在半导体衬底上的绝缘膜上形成下电极。 一对铁电体膜分别形成在下电极上。 在一对铁电体膜中的每一个上形成上电极。 形成铁电体膜的下部电极的一部分比不形成强电介质膜的部分厚。 通过使用该掩模在绝缘膜上依次沉积下电极，铁电体膜和上电极，在上电极上形成掩模，以蚀刻上电极和铁电体膜，从而形成图案 一对上电极和一对铁电电极，形成连续地覆盖一对上电极和一对铁电体膜的掩模，然后蚀刻下电极材料膜。

    Semiconductor device and method of manufacturing the same
    10.
    发明授权
    Semiconductor device and method of manufacturing the same 失效
    半导体装置及其制造方法

    公开(公告)号：US06680499B2

    公开(公告)日：2004-01-20

    申请号：US09988138

    申请日：2001-11-19

    申请人： Yoshinori Kumura ,  Hiroyuki Kanaya ,  Iwao Kunishima

    发明人： Yoshinori Kumura ,  Hiroyuki Kanaya ,  Iwao Kunishima

    IPC分类号： H01L2976

    CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/55

    摘要： Provided are a semiconductor memory device that permits increasing the degree of integration without decreasing the capacitance of the capacitor included in a memory cell, and a method of manufacturing the particular semiconductor memory device. Specifically, provided are a semiconductor memory device, comprising a semiconductor substrate, an interlayer insulating film formed on the semiconductor substrate, a first electrode formed on the interlayer insulating film, a first ferroelectric film formed on the first electrode, a second electrode formed on the first ferroelectric film, a second ferroelectric film formed on the second electrode, and a third electrode formed on the second ferroelectric film, and a method of manufacturing the particular semiconductor memory device.

    摘要翻译： 提供一种允许增加集成度而不减小包括在存储单元中的电容器的电容的半导体存储器件，以及制造特定半导体存储器件的方法。 具体地，提供一种半导体存储器件，包括半导体衬底，形成在半导体衬底上的层间绝缘膜，形成在层间绝缘膜上的第一电极，形成在第一电极上的第一铁电膜，形成在第一电极上的第二电极 第一铁电体膜，形成在第二电极上的第二铁电体膜和形成在第二铁电体膜上的第三电极，以及制造特定半导体存储器件的方法。