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公开(公告)号：US20110012231A1
公开(公告)日：2011-01-20
申请号：US12891214
申请日：2010-09-27
IPC分类号： H01L29/8605
CPC分类号： H01L27/0207 , H01L27/0629 , H01L27/0802 , H01L28/20
摘要： A semiconductor device of the invention has a plurality of resistor elements formed on an element isolating oxide film in predetermined regions on a surface of a semiconductor substrate. Active regions are furnished close to the resistor elements. This allows the element isolating oxide film near the resistor elements to be divided into suitable strips, forestalling a concave formation at the center of the element isolating oxide film upon polishing of the film by CMP and thereby enhancing dimensional accuracy of the resistor elements upon fabrication.
摘要翻译： 本发明的半导体器件具有在半导体衬底的表面上的预定区域中的元件隔离氧化膜上形成的多个电阻元件。 有源区靠近电阻元件配置。 这允许电阻元件附近的元件隔离氧化膜被分成合适的条，在通过CMP抛光膜时防止元件隔离氧化膜中心处的凹陷形成，从而提高制造时电阻器元件的尺寸精度。
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2.发明授权Semiconductor device having resistor elements and method for manufacturing the same 有权具有电阻元件的半导体器件及其制造方法公开(公告)号：US07821078B2
公开(公告)日：2010-10-26
申请号：US12007496
申请日：2008-01-11
IPC分类号： H01L27/088
CPC分类号： H01L27/0207 , H01L27/0629 , H01L27/0802 , H01L28/20
摘要： A semiconductor device of the invention has a plurality of resistor elements formed on an element isolating oxide film in predetermined regions on a surface of a semiconductor substrate. Active regions are furnished close to the resistor elements. This allows the element isolating oxide film near the resistor elements to be divided into suitable strips, forestalling a concave formation at the center of the element isolating oxide film upon polishing of the film by CMP and thereby enhancing dimensional accuracy of the resistor elements upon fabrication.
摘要翻译： 本发明的半导体器件具有在半导体衬底的表面上的预定区域中的元件隔离氧化膜上形成的多个电阻元件。 有源区靠近电阻元件配置。 这允许电阻元件附近的元件隔离氧化膜被分成合适的条，在通过CMP抛光膜时防止元件隔离氧化膜中心处的凹陷形成，从而提高制造时电阻器元件的尺寸精度。
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公开(公告)号：US20080116526A1
公开(公告)日：2008-05-22
申请号：US12007496
申请日：2008-01-11
IPC分类号： H01L27/06
CPC分类号： H01L27/0207 , H01L27/0629 , H01L27/0802 , H01L28/20
摘要： A semiconductor device of the invention has a plurality of resistor elements formed on an element isolating oxide film in predetermined regions on a surface of a semiconductor substrate. Active regions are furnished close to the resistor elements. This allows the element isolating oxide film near the resistor elements to be divided into suitable strips, forestalling a concave formation at the center of the element isolating oxide film upon polishing of the film by CMP and thereby enhancing dimensional accuracy of the resistor elements upon fabrication.
摘要翻译： 本发明的半导体器件具有在半导体衬底的表面上的预定区域中的元件隔离氧化膜上形成的多个电阻元件。 有源区靠近电阻元件配置。 这允许电阻元件附近的元件隔离氧化膜被分成合适的条，在通过CMP抛光膜时防止元件隔离氧化膜中心处的凹陷形成，从而提高制造时电阻器元件的尺寸精度。
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公开(公告)号：US08089136B2
公开(公告)日：2012-01-03
申请号：US12891214
申请日：2010-09-27
IPC分类号： H01L29/00
CPC分类号： H01L27/0207 , H01L27/0629 , H01L27/0802 , H01L28/20
摘要： A semiconductor device of the invention has a plurality of resistor elements formed on an element isolating oxide film in predetermined regions on a surface of a semiconductor substrate. Active regions are furnished close to the resistor elements. This allows the element isolating oxide film near the resistor elements to be divided into suitable strips, forestalling a concave formation at the center of the element isolating oxide film upon polishing of the film by CMP and thereby enhancing dimensional accuracy of the resistor elements upon fabrication.
摘要翻译： 本发明的半导体器件具有在半导体衬底的表面上的预定区域中的元件隔离氧化膜上形成的多个电阻元件。 有源区靠近电阻元件配置。 这允许电阻元件附近的元件隔离氧化膜被分成合适的条，在通过CMP抛光膜时防止元件隔离氧化膜中心处的凹陷形成，从而提高制造时电阻器元件的尺寸精度。
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公开(公告)号：US20060175679A1
公开(公告)日：2006-08-10
申请号：US11384244
申请日：2006-03-21
IPC分类号： H01L29/00
CPC分类号： H01L27/0207 , H01L27/0629 , H01L27/0802 , H01L28/20
摘要： A semiconductor device of the invention has a plurality of resistor elements formed on an element isolating oxide film in predetermined regions on a surface of a semiconductor substrate. Active regions are furnished close to the resistor elements. This allows the element isolating oxide film near the resistor elements to be divided into suitable strips, forestalling a concave formation at the center of the element isolating oxide film upon polishing of the film by CMP and thereby enhancing dimensional accuracy of the resistor elements upon fabrication.
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6.发明授权公开(公告)号：US07045865B2
公开(公告)日：2006-05-16
申请号：US09960495
申请日：2001-09-24
CPC分类号： H01L27/0207 , H01L27/0629 , H01L27/0802 , H01L28/20
摘要： A semiconductor device of the invention has a plurality of resistor elements formed on an element isolating oxide film in predetermined regions on a surface of a semiconductor substrate. Active regions are furnished close to the resistor elements. This allows the element isolating oxide film near the resistor elements to be divided into suitable strips, forestalling a concave formation at the center of the element isolating oxide film upon polishing of the film by CMP and thereby enhancing dimensional accuracy of the resistor elements upon fabrication.
摘要翻译： 本发明的半导体器件具有在半导体衬底的表面上的预定区域中的元件隔离氧化膜上形成的多个电阻元件。 有源区靠近电阻元件配置。 这允许电阻元件附近的元件隔离氧化膜被分成合适的条，在通过CMP抛光膜时防止元件隔离氧化膜中心处的凹陷形成，从而提高制造时电阻器元件的尺寸精度。
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公开(公告)号：US08223050B2
公开(公告)日：2012-07-17
申请号：US12911345
申请日：2010-10-25
IPC分类号： H03M1/20
摘要： In a delta-sigma A/D converter provided with plural channels for converting an analog input signal into a digital signal, an adverse influence of an idle tone is reduced in each channel. The delta-sigma A/D converter comprises: a first quantizer which quantizes and outputs a received signal; a first D/A converter which converts an output signal of the first quantizer into an analog signal, and outputs the converted analog signal; a first operation unit which outputs a signal indicative of a difference of the first analog input signal and an output signal of the first D/A converter; a first integrator which integrates an output signal of the first operation unit and outputs the integrated signal; a first dither circuit which generates a first dither signal; and a second operation unit which adds the first dither signal to the output signal of the first integrator and outputs the added signal to the first quantizer.
摘要翻译： 在具有用于将模拟输入信号转换为数字信号的多个通道的Δ-ΣA / D转换器中，在每个通道中降低了空闲音调的不利影响。 Δ-ΣA / D转换器包括：量化并输出接收信号的第一量化器; 第一D / A转换器，其将第一量化器的输出信号转换为模拟信号，并输出转换的模拟信号; 第一操作单元，其输出表示第一模拟输入信号和第一D / A转换器的输出信号的差的信号; 第一积分器，其对第一运算单元的输出信号进行积分并输出积分信号; 产生第一抖动信号的第一抖动电路; 以及第二操作单元，其将第一抖动信号添加到第一积分器的输出信号，并将相加的信号输出到第一量化器。
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公开(公告)号：US08188526B2
公开(公告)日：2012-05-29
申请号：US12958923
申请日：2010-12-02
申请人： Takashi Okuda , Toshio Kumamoto
发明人： Takashi Okuda , Toshio Kumamoto
CPC分类号： H01L23/585 , H01L27/0248 , H01L27/092 , H01L2924/0002 , H01L2924/00
摘要： It is an object of the present invention to surely protect a predetermined semiconductor element or a predetermined semiconductor element group in an analog block from a noise generated from a digital block. A semiconductor device according to the present invention includes a semiconductor substrate, a digital block to be a region in which a digital circuit is formed and an analog block to be a region in which an analog circuit is formed, arranged by separating an upper surface of the semiconductor substrate and a substrate potential fixing region provided on the semiconductor substrate so as to surround in a planar view the predetermined semiconductor element group in the analog block, and a pad connected to the substrate potential fixing region and receiving a predetermined potential from an external part.
摘要翻译： 本发明的目的是确保将模拟块中的预定半导体元件或预定半导体元件组与数字块产生的噪声保护起来。 根据本发明的半导体器件包括半导体衬底，作为形成数字电路的区域的数字块和形成模拟电路的区域的模拟块，通过将模拟电路的上表面 半导体基板和设置在半导体基板上的基板电位固定区域，以在平面图中包围模拟块中的预定半导体元件组，以及连接到基板电位固定区域并从外部接收预定电位的焊盘 部分。
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公开(公告)号：US07915708B2
公开(公告)日：2011-03-29
申请号：US12485528
申请日：2009-06-16
申请人： Takashi Okuda , Yasuo Morimoto , Yuko Maruyama , Toshio Kumamoto
发明人： Takashi Okuda , Yasuo Morimoto , Yuko Maruyama , Toshio Kumamoto
IPC分类号： H01L29/00
CPC分类号： H01L23/5223 , H01L23/5225 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A semiconductor device includes a semiconductor substrate including a main surface; a plurality of first interconnections formed in a capacitance forming region defined on the main surface and extending in a predetermined direction; a plurality of second interconnections each adjacent to the first interconnection located at an edge of the capacitance forming region, extending in the predetermined direction, and having a fixed potential; and an insulating layer formed on the main surface and filling in between each of the first interconnections and between the first interconnection and the second interconnection adjacent to each other. The first interconnections and the second interconnections are located at substantially equal intervals in a plane parallel to the main surface, and located to align in a direction substantially perpendicular to the predetermined direction.
摘要翻译： 半导体器件包括：包括主表面的半导体衬底; 多个第一互连形成在形成在主表面上并沿预定方向延伸的电容形成区域中; 多个第二互连，每个相邻于位于电容形成区域的边缘处的第一互连，沿预定方向延伸并具有固定电位; 以及绝缘层，形成在主表面上，并且填充在每个第一互连之间以及第一互连和第二互连之间相邻。 第一互连和第二互连在平行于主表面的平面中以基本相等的间隔定位，并且被定位成在基本上垂直于预定方向的方向上对齐。
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公开(公告)号：US07868413B2
公开(公告)日：2011-01-11
申请号：US12267166
申请日：2008-11-07
申请人： Takashi Okuda , Toshio Kumamoto
发明人： Takashi Okuda , Toshio Kumamoto
IPC分类号： H01L21/762
CPC分类号： H01L23/585 , H01L27/0248 , H01L27/092 , H01L2924/0002 , H01L2924/00
摘要： It is an object of the present invention to surely protect a predetermined semiconductor element or a predetermined semiconductor element group in an analog block from a noise generated from a digital block. A semiconductor device according to the present invention includes a semiconductor substrate, a digital block to be a region in which a digital circuit is formed and an analog block to be a region in which an analog circuit is formed, arranged by separating an upper surface of the semiconductor substrate and a substrate potential fixing region provided on the semiconductor substrate so as to surround in a planar view the predetermined semiconductor element group in the analog block, and a pad connected to the substrate potential fixing region and receiving a predetermined potential from an external part.
摘要翻译： 本发明的目的是确保将模拟块中的预定半导体元件或预定半导体元件组与数字块产生的噪声保护起来。 根据本发明的半导体器件包括半导体衬底，作为形成数字电路的区域的数字块和形成模拟电路的区域的模拟块，通过将模拟电路的上表面 半导体基板和设置在半导体基板上的基板电位固定区域，以在平面图中包围模拟块中的预定半导体元件组，以及连接到基板电位固定区域并从外部接收预定电位的焊盘 部分。
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