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公开(公告)号：US20080048264A1
公开(公告)日：2008-02-28
申请号：US11976265
申请日：2007-10-23
IPC分类号： H01L27/01
CPC分类号： H01L29/66757 , H01L21/31116 , H01L21/32137 , H01L29/78633 , H01L29/78636
摘要： A method for forming a pattern of a stacked film, includes steps (a) to (e). The step (a) is forming sequentially a first base insulating film and a light shielding material on a transparent substrate. The step (b) is patterning the light shielding material to obtain a light shielding film with a first pattern. The step (c) is forming sequentially a second base insulating film, a semiconductor film and a first oxide film on a substrate. The step (d) is forming a resist pattern with a second pattern on the first oxide film. The step (e) is forming a pattern of a stacked film by dry etching the first oxide film and the semiconductor film, above the light shielding film. The stacked film includes the semiconductor film and the first oxide film. The dry etching includes an etching by using an etching gas and the resist pattern as a mask. The semiconductor film includes a taper angle which is controlled to be within predetermined range.
摘要翻译： 一种形成层叠膜的图案的方法，包括步骤（a）至（e）。 步骤（a）在透明基板上依次形成第一基底绝缘膜和遮光材料。 步骤（b）是图案化遮光材料以获得具有第一图案的遮光膜。 步骤（c）在衬底上依次形成第二基底绝缘膜，半导体膜和第一氧化物膜。 步骤（d）是在第一氧化膜上形成具有第二图案的抗蚀剂图案。 步骤（e）通过在遮光膜上方干蚀刻第一氧化膜和半导体膜来形成堆叠膜的图案。 叠层膜包括半导体膜和第一氧化物膜。 干蚀刻包括通过使用蚀刻气体和抗蚀剂图案作为掩模的蚀刻。 半导体膜包括被控制在预定范围内的锥角。
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2.发明授权Stacked film including a semiconductor film having a taper angle, and thin film transistor including the stacked film 有权包括具有锥角的半导体膜的叠层膜和包括该层叠膜的薄膜晶体管公开(公告)号：US07781837B2
公开(公告)日：2010-08-24
申请号：US11976265
申请日：2007-10-23
IPC分类号： H01L27/12 , H01L27/01 , H01L31/0392
CPC分类号： H01L29/66757 , H01L21/31116 , H01L21/32137 , H01L29/78633 , H01L29/78636
摘要： A method for forming a pattern of a stacked film, includes steps (a) to (e). The step (a) is forming sequentially a first base insulating film and a light shielding material on a transparent substrate. The step (b) is patterning the light shielding material to obtain a light shielding film with a first pattern. The step (c) is forming sequentially a second base insulating film, a semiconductor film and a first oxide film on a substrate. The step (d) is forming a resist pattern with a second pattern on the first oxide film. The step (e) is forming a pattern of a stacked film by dry etching the first oxide film and the semiconductor film, above the light shielding film. The stacked film includes the semiconductor film and the first oxide film. The dry etching includes an etching by using an etching gas and the resist pattern as a mask. The semiconductor film includes a taper angle which is controlled to be within predetermined range.
摘要翻译： 一种形成层叠膜的图案的方法，包括步骤（a）至（e）。 步骤（a）在透明基板上依次形成第一基底绝缘膜和遮光材料。 步骤（b）是图案化遮光材料以获得具有第一图案的遮光膜。 步骤（c）在衬底上依次形成第二基底绝缘膜，半导体膜和第一氧化物膜。 步骤（d）是在第一氧化膜上形成具有第二图案的抗蚀剂图案。 步骤（e）通过在遮光膜上方干蚀刻第一氧化膜和半导体膜来形成堆叠膜的图案。 叠层膜包括半导体膜和第一氧化物膜。 干蚀刻包括通过使用蚀刻气体和抗蚀剂图案作为掩模的蚀刻。 半导体膜包括被控制在预定范围内的锥角。
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公开(公告)号：US06933241B2
公开(公告)日：2005-08-23
申请号：US10446713
申请日：2003-05-29
IPC分类号： H01L21/311 , H01L21/3213 , H01L21/336 , H01L21/302
CPC分类号： H01L29/66757 , H01L21/31116 , H01L21/32137
摘要： A semiconductor film serving as an active region of a thin film transistor and an upper oxide film protecting the semiconductor film are dry etched to form the active region. In this case, a fluorine-based gas is used as the etching gas, and the etching gas is switched from the fluorine-based gas to a chlorine-based gas at a point of time when a lower oxide film as an underlying film of the semiconductor film is exposed. As the fluorine-based gas, a mixed gas of CF4 and O2 is used, and suitably, a gas ratio of CF4 and O2 in the mixture gas is set at 1:1, and the dry etching is performed therefor. By this etching, a side face of a two-layer structure of the semiconductor film and upper oxide film is optimally tapered, and a crack or a disconnection is prevented from being occurring in a film crossing over the two-layer structure.
摘要翻译： 用作薄膜晶体管的有源区的半导体膜和保护半导体膜的上氧化膜被干蚀刻以形成有源区。 在这种情况下，使用氟系气体作为蚀刻气体，在作为下面的膜的低氧化膜的时刻，将蚀刻气体从氟系气体切换为氯系气体 露出半导体膜。 作为氟系气体，使用CF 4和O 2的混合气体，适当地是CF 3〜4的气体比 混合气体中的O 2设定为1:1，并进行干法蚀刻。 通过该蚀刻，半导体膜和上氧化物膜的两层结构的侧面是最佳的锥形，并且防止了在跨越两层结构的膜中发生裂纹或断开。
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公开(公告)号：US20050156239A1
公开(公告)日：2005-07-21
申请号：US10999125
申请日：2004-11-30
IPC分类号： H01L21/311 , H01L21/3213 , H01L21/336 , H01L21/00 , H01L21/461 , H01L27/01 , H01L31/0392
CPC分类号： H01L29/66757 , H01L21/31116 , H01L21/32137 , H01L29/78633 , H01L29/78636
摘要： A method for forming a pattern of a stacked film, includes steps (a) to (e). The step (a) is forming sequentially a first base insulating film and a light shielding material on a transparent substrate. The step (b) is patterning the light shielding material to obtain a light shielding film with a first pattern. The step (c) is forming sequentially a second base insulating film, a semiconductor film and a first oxide film on a substrate. The step (d) is forming a resist pattern with a second pattern on the first oxide film. The step (e) is forming a pattern of a stacked film by dry etching the first oxide film and the semiconductor film, above the light shielding film. The stacked film includes the semiconductor film and the first oxide film. The dry etching includes an etching by using an etching gas and the resist pattern as a mask. The semiconductor film includes a taper angle which is controlled to be within predetermined range.
摘要翻译： 一种形成层叠膜的图案的方法，包括步骤（a）至（e）。 步骤（a）在透明基板上依次形成第一基底绝缘膜和遮光材料。 步骤（b）是图案化遮光材料以获得具有第一图案的遮光膜。 步骤（c）在衬底上依次形成第二基底绝缘膜，半导体膜和第一氧化物膜。 步骤（d）是在第一氧化膜上形成具有第二图案的抗蚀剂图案。 步骤（e）通过在遮光膜上方干蚀刻第一氧化膜和半导体膜来形成堆叠膜的图案。 叠层膜包括半导体膜和第一氧化物膜。 干蚀刻包括通过使用蚀刻气体和抗蚀剂图案作为掩模的蚀刻。 半导体膜包括被控制在预定范围内的锥角。
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公开(公告)号：US07317227B2
公开(公告)日：2008-01-08
申请号：US10855394
申请日：2004-05-28
IPC分类号： H01L27/01
CPC分类号： H01L29/66757 , H01L21/31116 , H01L21/32137
摘要： A semiconductor film serving as an active region of a thin film transistor and an upper oxide film protecting the semiconductor film are dry etched to form the active region. In this case, a fluorine-based gas is used as the etching gas, and the etching gas is switched from the fluorine-based gas to a chlorine-based gas at a point of time when a lower oxide film as an underlying film of the semiconductor film is exposed. As the fluorine-based gas, a mixed gas of CF4 and O2 is used, and suitably, a gas ratio of CF4 and O2 in the mixture gas is set at 1:1, and the dry etching is performed therefor. By this etching, a side face of a two-layer structure of the semiconductor film and upper oxide film is optimally tapered, and a crack or a disconnection is prevented from being occurring in a film crossing over the two-layer structure.
摘要翻译： 用作薄膜晶体管的有源区的半导体膜和保护半导体膜的上氧化膜被干蚀刻以形成有源区。 在这种情况下，使用氟系气体作为蚀刻气体，在作为下面的膜的低氧化膜的时刻，将蚀刻气体从氟系气体切换为氯系气体 露出半导体膜。 作为氟系气体，使用CF 4和O 2的混合气体，适当地是CF 3〜4的气体比 混合气体中的O 2设定为1:1，并进行干法蚀刻。 通过该蚀刻，半导体膜和上氧化物膜的两层结构的侧面是最佳的锥形，并且防止了在跨越两层结构的膜中发生裂纹或断开。
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公开(公告)号：US07303945B2
公开(公告)日：2007-12-04
申请号：US10999125
申请日：2004-11-30
CPC分类号： H01L29/66757 , H01L21/31116 , H01L21/32137 , H01L29/78633 , H01L29/78636
摘要： A method for forming a pattern of a stacked film, includes steps (a) to (e). The step (a) is forming sequentially a first base insulating film and a light shielding material on a transparent substrate. The step (b) is patterning the light shielding material to obtain a light shielding film with a first pattern. The step (c) is forming sequentially a second base insulating film, a semiconductor film and a first oxide film on a substrate. The step (d) is forming a resist pattern with a second pattern on the first oxide film. The step (e) is forming a pattern of a stacked film by dry etching the first oxide film and the semiconductor film, above the light shielding film. The stacked film includes the semiconductor film and the first oxide film. The dry etching includes an etching by using an etching gas and the resist pattern as a mask. The semiconductor film includes a taper angle which is controlled to be within predetermined range.
摘要翻译： 一种形成层叠膜的图案的方法，包括步骤（a）至（e）。 步骤（a）在透明基板上依次形成第一基底绝缘膜和遮光材料。 步骤（b）是图案化遮光材料以获得具有第一图案的遮光膜。 步骤（c）在衬底上依次形成第二基底绝缘膜，半导体膜和第一氧化物膜。 步骤（d）是在第一氧化膜上形成具有第二图案的抗蚀剂图案。 步骤（e）通过在遮光膜上方干蚀刻第一氧化膜和半导体膜来形成堆叠膜的图案。 叠层膜包括半导体膜和第一氧化物膜。 干蚀刻包括通过使用蚀刻气体和抗蚀剂图案作为掩模的蚀刻。 半导体膜包括被控制在预定范围内的锥角。
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公开(公告)号：US07955845B2
公开(公告)日：2011-06-07
申请号：US10850294
申请日：2004-05-20
申请人： Naoto Hirano , Marcus Butler , Lee M. Nadler
发明人： Naoto Hirano , Marcus Butler , Lee M. Nadler
CPC分类号： C12N5/0639 , A61K38/00 , A61K39/0011 , A61K39/12 , A61K2039/5154 , A61K2039/5156 , C07K14/70539 , C07K2319/40 , C07K2319/50 , C07K2319/60 , C12N15/62 , C12N2740/13043 , C12N2740/16234 , C12N2760/16022 , C12N2760/16034
摘要： The invention relates to antigen-presenting cells having specificity against a selected antigen and methods for making the cells. The invention also relates to a method of selecting efficient antigen-presenting cells using reporter fusion constructs. The highly efficient antigen-presenting cells of the invention will provide a therapeutic strategy of modulating immune responses for a variety of diseases.
摘要翻译： 本发明涉及对所选抗原具有特异性的抗原呈递细胞和用于制备细胞的方法。 本发明还涉及使用报道融合构建体选择有效的抗原呈递细胞的方法。 本发明的高效抗原呈递细胞将提供调节各种疾病的免疫应答的治疗策略。
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公开(公告)号：US06512337B2
公开(公告)日：2003-01-28
申请号：US09939755
申请日：2001-08-28
申请人： Naoto Hirano , Hiroshi Hasegawa , Nobumitsu Aibara
发明人： Naoto Hirano , Hiroshi Hasegawa , Nobumitsu Aibara
IPC分类号： G09G310
CPC分类号： H01J11/24 , H01J11/12 , H01J2211/245
摘要： Each cell of a PDP is provided with a pair of narrow and substantially U-shaped plane electrodes, which are connected to a corresponding trace electrode at the open ends thereof (located at the respective non-discharging gap sides) to operate as scan electrode and common electrode. A plane discharging gap is defined between the closed front ends of the plane electrodes. The plane electrodes have a curved profile at the front ends thereof with the highest point located at the longitudinal central axis of the cell. With this arrangement, the effective length of the plane electrodes can be increased without increasing the surface area of the plane electrodes so that the plane electrodes overlap the data electrode at the front ends thereof over an expanded area.
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公开(公告)号：US08241423B2
公开(公告)日：2012-08-14
申请号：US11863861
申请日：2007-09-28
申请人： Eisyun Ikubo , Naoto Hirano , Moritaka Iwasa
发明人： Eisyun Ikubo , Naoto Hirano , Moritaka Iwasa
IPC分类号： C30B21/04
CPC分类号： H01L29/0657 , H01L21/0206 , H01L21/02068
摘要： A semiconductor wafer for an epitaxial growth is disclosed comprising: a main face on which a vapor phase epitaxial layer grows; a back face provided on an opposite side of the wafer; a main chamfered part along a circumferential edge where the main face and a side face of the wafer meet; and a back chamfered part along a circumferential edge where the back face and the side face meet is provided. After a CVD layer formation process is conducted to form a layer at least on the back face and the back chamfered part, a machining process is conducted on the main face to remove a CVD layer at least partially formed thereon so as to polish the main face to a mirror finished surface with a maximum height of profile (Rz) not exceeding 0.3 μm.
摘要翻译： 公开了一种用于外延生长的半导体晶片，包括：气相外延层生长的主面; 设置在晶片的相对侧上的背面; 沿着圆周边缘的主要倒角部分，其中主面和晶片的侧面相交; 并且设置有沿着背面和侧面相交的周缘的后倒角部。 在进行CVD层形成处理以至少在背面和背面倒角部分上形成层后，在主面上进行机械加工，以去除其上至少部分地形成的CVD层，以便抛光主面 到镜面加工表面，最大轮廓高度（Rz）不超过0.3μm。
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公开(公告)号：US20080084161A1
公开(公告)日：2008-04-10
申请号：US11930399
申请日：2007-10-31
申请人： Yoshio SANO , Nobumitsu Aibara , Yoshiaki Yanai , Toshiyuki Akiyama , Tetsumasa Okamoto , Kazuaki Yanagida , Hirokazu Tateno , Naoto Hirano , Yoshito Tanaka , Tadashi Nakamura , Keiji Nunomura
发明人： Yoshio SANO , Nobumitsu Aibara , Yoshiaki Yanai , Toshiyuki Akiyama , Tetsumasa Okamoto , Kazuaki Yanagida , Hirokazu Tateno , Naoto Hirano , Yoshito Tanaka , Tadashi Nakamura , Keiji Nunomura
IPC分类号： H01J17/49
CPC分类号： H01J11/24 , H01J11/12 , H01J11/32 , H01J11/36 , H01J2211/245 , H01J2211/323 , H01J2211/326 , H01J2211/361
摘要： Ribs for defining pixel cells are formed in the shape of a lattice, and sustain electrodes and scan electrodes are disposed near the ribs. The electrodes are spaced apart in each pixel cell, and the sustain electrode and the scan electrode are each cut away between pixel cells arranged in the row direction to provide each pixel cell with individually separated electrodes. In addition, between pixel cells adjacent to each other in the row direction, the sustain electrodes and the scan electrodes are connected to each other by means of a sustain-side bus electrode and a scan-side bus electrode, respectively. This makes it possible to provide a high luminous efficiency. Furthermore, each pixel cell is provided with a wide distance between the electrodes and thereby with a large effective opening portion. Thus, this provides only a small amount of reduction in intensity when the electrodes are spaced apart between the pixel cells arranged in the row direction in order to increase the luminous efficiency. The sustain electrodes or the scan electrodes can be connected to each other or shared between pixel cells adjacent to each other in the column direction and thus the effective opening portion can be made larger, thereby making it possible to provide a further increased intensity and luminous efficiency.
摘要翻译： 用于限定像素单元的肋形成为格子形状，并且维持电极和扫描电极设置在肋附近。 电极在每个像素单元中间隔开，并且维持电极和扫描电极各自在排列在行方向上的像素单元之间被切除，以为每个像素单元提供单独分离的电极。 此外，在行方向上彼此相邻的像素单元之间，维持电极和扫描电极分别通过维持侧总线电极和扫描侧总线电极相互连接。 这使得可以提供高的发光效率。 此外，每个像素单元在电极之间设置有较大的距离，从而具有大的有效开口部分。 因此，为了提高发光效率，当在行方向上排列的像素单元之间间隔开电极时，这仅提供少量的强度降低。 维持电极或扫描电极可以彼此连接或者在列方向上彼此相邻的像素单元之间共享，从而可以使有效开口部分更大，从而可以进一步提高强度和发光效率 。
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