Resin Composition, and Prepreg and Printed Circuit Board Prepared Using the Same
    5.
    发明申请
    Resin Composition, and Prepreg and Printed Circuit Board Prepared Using the Same 审中-公开
    树脂组合物,以及使用其制备的预浸料和印刷电路板

    公开(公告)号:US20120097437A1

    公开(公告)日:2012-04-26

    申请号:US13006530

    申请日:2011-01-14

    IPC分类号: H05K1/03 C08K3/34 C08L63/00

    摘要: A resin composition is provided. The resin composition comprises: an epoxy resin; a polymer solution as a hardener, which is prepared by the following steps: (a) dissolving an N,O-heterocyclic compound into a first solvent to form a first reaction solution, wherein the N,O-heterocyclic compound is of Formula I or Formula II: wherein, R1 to R3, W1, W2, m, n, p and q are defined in the specification; (b) heating the first reaction solution to a first temperature to carry out a ring-opening polymerization; and (c) cooling the first reaction solution to a second temperature to substantially terminate the ring-opening polymerization, and thus obtain the polymer solution, wherein, the first solvent is unreactive to the N,O-heterocyclic compound; the first temperature is higher than the softening temperature of the N,O-heterocyclic compound and lower than the boiling point of the first solvent; and the second temperature is lower than the first temperature, and wherein, the amount of the hardener, based on the solid, is about 20 parts by weight to about 200 parts by weight per 100 parts by weight of the epoxy resin.

    摘要翻译: 提供树脂组合物。 树脂组合物包含:环氧树脂; 作为硬化剂的聚合物溶液,其通过以下步骤制备:(a)将N,O-杂环化合物溶解在第一溶剂中以形成第一反应溶液,其中所述N,O-杂环化合物为式I或 式II:其中,R1至R3,W1,W2,m,n,p和q在说明书中定义; (b)将第一反应溶液加热至第一温度以进行开环聚合; 和(c)将第一反应溶液冷却至第二温度以基本上终止开环聚合,从而获得聚合物溶液,其中第一溶剂对N,O-杂环化合物不反应; 第一温度高于N,O-杂环化合物的软化温度,低于第一溶剂的沸点; 并且第二温度低于第一温度,并且其中,基于固体的固化剂的量为每100重量份环氧树脂约20重量份至约200重量份。

    Backlight module
    8.
    发明授权
    Backlight module 有权
    背光模组

    公开(公告)号:US08348444B2

    公开(公告)日:2013-01-08

    申请号:US12793692

    申请日:2010-06-04

    IPC分类号: G09F13/04

    摘要: A backlight module includes a back plate, a plurality of lamps, a lamp fixing base, and a diffusion plate. The back plate has a cavity. The lamps are disposed on or above the back plate. The lamp fixing base is disposed on the back plate for fixing the lamps. The lamp fixing base has a supporting portion extending along a direction away from the back plate. An orthogonal projection of the supporting portion on the back plate is within a boundary of the cavity. The diffusion plate is disposed above or over the back plate, and the supporting portion is suitable for supporting the diffusion plate.

    摘要翻译: 背光模块包括背板,多个灯,灯固定底座和扩散板。 背板有一个空腔。 灯设置在背板上或上面。 灯固定座设置在背板上用于固定灯。 灯固定座具有沿远离背板的方向延伸的支撑部。 背板上的支撑部分的正交突起在空腔的边界内。 扩散板设置在背板的上方或上方,支撑部适合于支撑扩散板。

    High speed differential signaling logic gate and applications thereof
    9.
    再颁专利
    High speed differential signaling logic gate and applications thereof 有权
    高速差分信号逻辑门及其应用

    公开(公告)号:USRE43160E1

    公开(公告)日:2012-02-07

    申请号:US12026164

    申请日:2008-02-05

    申请人: Tsung-Hsien Lin

    发明人: Tsung-Hsien Lin

    IPC分类号: H03K19/20

    CPC分类号: H03K19/09432

    摘要: A high-speed differential signaling logic gate includes a 1st input transistor, 2nd input transistor, complimentary transistor, current source, a 1st load, and a 2nd load. The 1st input transistor is operably coupled to receive a 1st input logic signal, which may be one phase of a first differential input signal. The 2nd input transistor is coupled in parallel with the 1st input transistor and is further coupled to receive a 2nd input logic signal, which may be one phase of a 2nd differential input signal. The complimentary transistor is operably coupled to the sources of the 1st and 2nd input transistors and to receive a complimentary input signal, which mimics the other phase of the 1st differential logic signal and the 2nd differential logic signal. The current source sinks a fixed current from the 1st and 2nd input transistors and the complimentary transistor. The 1st load is operably coupled to the drains of the 1st and 2nd input transistors to provide a 1st phase of a differential logic output. The 2nd load is coupled to the drain of the complimentary transistor to provide a 2nd phase of the differential logic output.

    摘要翻译: 高速差分信号逻辑门包括第一输入晶体管,第二输入晶体管,互补晶体管,电流源,第一负载和第二负载。 第一输入晶体管可操作地耦合以接收第一输入逻辑信号,其可以是第一差分输入信号的一相。 第二输入晶体管与第一输入晶体管并联并且进一步耦合以接收第二输入逻辑信号,其可以是第二差分输入信号的一相。 互补晶体管可操作地耦合到第一和第二输入晶体管的源极并且接收互补输入信号,其模拟第一差分逻辑信号和第二差分逻辑信号的另一相位。 电流源从第一和第二输入晶体管和互补晶体管吸收固定电流。 第一负载可操作地耦合到第一和第二输入晶体管的漏极,以提供差分逻辑输出的第一相。 第二负载耦合到互补晶体管的漏极,以提供差分逻辑输出的第二相。