Abstract:
A chip includes a processor, a memory, and a storage controller of the memory. There is an access path between the processor and the storage controller, and the processor reads data from or writes data into the memory by using the storage controller through the access path. The chip further includes a shielding circuit. The shielding circuit is configured to shield a signal on the access path when the processor is powered off.
Abstract:
Embodiments of the present invention disclose a method and an apparatus for controlling chip performance, and relate to the field of communications technologies, which solves a problem in the prior art that a chip is reset or performance is greatly decreased as long as a temperature of the chip is higher than a preset threshold. The method includes: obtaining a working temperature of a chip; when the working temperature of the chip reaches one of multiple preset temperature thresholds, obtaining, according to preset correspondence between a temperature threshold and a chip performance control policy, a chip performance control policy that corresponds to the one of the multiple temperature thresholds; and controlling working of the chip according to the control policy. The present invention is applicable to an electronic device to which a chip is applied, such as a desktop computer or a notebook computer.
Abstract:
Embodiments of the present invention disclose a method and an apparatus for controlling chip performance, and relate to the field of communications technologies, which solves a problem in the prior art that a chip is reset or performance is greatly decreased as long as a temperature of the chip is higher than a preset threshold. The method includes: obtaining a working temperature of a chip; when the working temperature of the chip reaches one of multiple preset temperature thresholds, obtaining, according to preset correspondence between a temperature threshold and a chip performance control policy, a chip performance control policy that corresponds to the one of the multiple temperature thresholds; and controlling working of the chip according to the control policy. The present invention is applicable to an electronic device to which a chip is applied, such as a desktop computer or a notebook computer.
Abstract:
A voltage regulation circuit includes an obtainer that is configured to obtain load information of a corresponding load and output the load information to a corresponding controller. The corresponding controller generates a switch control signal based on the load information and outputs the switch controller to at least one switch. The at least one switch regulates, based on the accurate switch control signal, a voltage input to the corresponding load.
Abstract:
The present disclosure provides a control system and a control method for a double data rate synchronous dynamic random access memory (DDR) system in order to reduce power consumption of the DDR system. The system includes a memory and a processor coupled to the memory, and the processor is configured to monitor a working status of each functional system that shares a power domain with the DDR system, determine a target power parameter value and a target clock parameter value of the DDR system according to the working status of each functional system, and control a power parameter and a clock parameter of the DDR system according to the target power parameter value and the target clock parameter value of the DDR system.
Abstract:
The present invention discloses a method, an apparatus, and a system for adaptively adjusting a voltage. The method includes: acquiring an internal temperature code of a system chip and a time sequence code of a system logic circuit, where the internal temperature code is detected by a temperature sensor and the time sequence code is output by a time sequence monitoring unit; selecting a time sequence reference calibration code from multiple configured time sequence reference calibration codes according to the acquired temperature code; and comparing the acquired time sequence code with the selected time sequence reference calibration code and determining, according to a comparison result, an adjustment voltage to be output for a system load. By using the foregoing method, the present invention can better reduce a power loss and achieve a better power reduction effect.
Abstract:
The present invention discloses a method, an apparatus, and a system for adaptively adjusting a voltage. The method includes: acquiring an internal temperature code of a system chip and a time sequence code of a system logic circuit, where the internal temperature code is detected by a temperature sensor and the time sequence code is output by a time sequence monitoring unit; selecting a time sequence reference calibration code from multiple configured time sequence reference calibration codes according to the acquired temperature code; and comparing the acquired time sequence code with the selected time sequence reference calibration code and determining, according to a comparison result, an adjustment voltage to be output for a system load. By using the foregoing method, the present invention can better reduce a power loss and achieve a better power reduction effect.
Abstract:
The present disclosure provides a control system and a control method for a double data rate synchronous dynamic random access memory (DDR) system in order to reduce power consumption of the DDR system. The system includes a memory and a processor coupled to the memory, and the processor is configured to monitor a working status of each functional system that shares a power domain with the DDR system, determine a target power parameter value and a target clock parameter value of the DDR system according to the working status of each functional system, and control a power parameter and a clock parameter of the DDR system according to the target power parameter value and the target clock parameter value of the DDR system.
Abstract:
A chip includes a processor, a memory, and a storage controller of the memory. There is an access path between the processor and the storage controller, and the processor reads data from or writes data into the memory by using the storage controller through the access path. The chip further includes a shielding circuit. The shielding circuit is configured to shield a signal on the access path when the processor is powered off.
Abstract:
Embodiments of the present application disclose a method for saving a running log, including: when a running exception occurs in an operating system, configuring that a random access memory adapted to record a running log of the operating system works in a self-refresh mode; performing reset on an application processor of the operating system and keeping a power management unit working normally, where the power management unit is adapted to manage power of the application processor and the random access memory; acquiring the running log of the operating system from the random access memory and saving the running log of the operating system, after reset of the application processor is completed. The embodiments of the present application further disclose a device. By adopting the present application, it can be ensured that a log is saved completely during a preset process of the system.