公开(公告)号：US09153600B2

公开(公告)日：2015-10-06

申请号：US13618308

申请日：2012-09-14

申请人： Hye Young Ryu ,  Hee Jun Byeon ,  Woo Geun Lee ,  Kap Soo Yoon ,  Yoon Ho Kim ,  Chun Won Byun

发明人： Hye Young Ryu ,  Hee Jun Byeon ,  Woo Geun Lee ,  Kap Soo Yoon ,  Yoon Ho Kim ,  Chun Won Byun

IPC分类号： G02F1/1343 ,  G02F1/1362 ,  H01L27/12

CPC分类号： H01L27/127 ,  G02F1/134363 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136222 ,  G02F2001/136295 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1262

摘要： A thin film transistor array panel and a manufacturing method thereof according to an exemplary embodiment of the present invention form a contact hole in a second passivation layer formed of an organic insulator, protect a side of the contact hole by covering with a protection member formed of the same layer as the first field generating electrode and formed of a transparent conductive material, and etch the first passivation layer below the second passivation layer using the protection member as a mask. Therefore, it is possible to prevent the second passivation layer formed of an organic insulator from being overetched while etching the insulating layer below the second passivation layer so that the contact hole is prevented from being made excessively wide.

摘要翻译： 根据本发明的示例性实施例的薄膜晶体管阵列面板及其制造方法在由有机绝缘体形成的第二钝化层中形成接触孔，通过用由保护构件形成的保护构件覆盖来保护接触孔的一侧 与第一场产生电极相同的层并由透明导电材料形成，并且使用保护构件作为掩模，将第二钝化层下面的第一钝化层蚀刻。 因此，可以防止由有机绝缘体形成的第二钝化层在蚀刻第二钝化层下方的绝缘层的同时进行过蚀刻，从而防止接触孔过宽。

公开(公告)号：US08866137B2

公开(公告)日：2014-10-21

申请号：US13365704

申请日：2012-02-03

申请人： Jin-Won Lee ,  Woo Geun Lee ,  Kap Soo Yoon ,  Ki-Won Kim ,  Hyun-Jung Lee ,  Hee-Jun Byeon ,  Ji-Soo Oh

发明人： Jin-Won Lee ,  Woo Geun Lee ,  Kap Soo Yoon ,  Ki-Won Kim ,  Hyun-Jung Lee ,  Hee-Jun Byeon ,  Ji-Soo Oh

IPC分类号： H01L29/12 ,  H01L27/12 ,  H01L29/417

CPC分类号： H01L27/1225 ,  H01L29/41733

摘要： A thin film transistor array panel includes: a gate electrode disposed on an insulation substrate; a gate insulating layer disposed on the gate electrode; a first electrode and an oxide semiconductor disposed directly on the gate insulating layer; a source electrode and a drain electrode formed on the oxide semiconductor; a passivation layer disposed on the first electrode, the source electrode, and the drain electrode; and a second electrode disposed on the passivation layer.

摘要翻译： 薄膜晶体管阵列面板包括：设置在绝缘基板上的栅电极; 设置在栅电极上的栅极绝缘层; 直接设置在栅极绝缘层上的第一电极和氧化物半导体; 形成在所述氧化物半导体上的源电极和漏电极; 设置在所述第一电极，所述源电极和所述漏电极上的钝化层; 以及设置在钝化层上的第二电极。

公开(公告)号：US09178024B2

公开(公告)日：2015-11-03

申请号：US13464613

申请日：2012-05-04

申请人： Ki-Won Kim ,  Kap Soo Yoon ,  Woo Geun Lee ,  Jin-Won Lee ,  Se-Myung Kwon ,  Jung Ouck Ahn ,  Si Jin Kim

发明人： Ki-Won Kim ,  Kap Soo Yoon ,  Woo Geun Lee ,  Jin-Won Lee ,  Se-Myung Kwon ,  Jung Ouck Ahn ,  Si Jin Kim

IPC分类号： H01L21/00 ,  H01L29/417 ,  H01L29/66 ,  H01L27/12 ,  H01L29/786

CPC分类号： H01L29/41733 ,  H01L27/1225 ,  H01L27/1259 ,  H01L29/66765 ,  H01L29/78696

摘要： A method for manufacturing a thin film transistor array panel includes forming a gate line and a gate electrode protruding from the gate line on a substrate; forming a gate insulating layer on the gate line and the gate electrode; depositing sequentially a semiconductor material and a metal material on the gate insulating layer; performing a first etching operation on the semiconductor material and the metal material using a first mask to form a semiconductor layer and a metal layer, the metal layer including a data line, a source electrode, and a drain electrode, in which the drain electrode protrudes from the data line, and the source electrode and the drain electrode having an integral shape; and performing a second etching operation on the metal layer using a second mask to divide the source electrode and the drain electrode.

摘要翻译： 一种制造薄膜晶体管阵列面板的方法，包括：在基板上形成从栅极线突出的栅极线和栅电极; 在栅极线和栅电极上形成栅极绝缘层; 在栅极绝缘层上依次沉积半导体材料和金属材料; 使用第一掩模对所述半导体材料和所述金属材料进行第一蚀刻操作以形成半导体层和金属层，所述金属层包括数据线，源电极和漏电极，其中所述漏电极突出 数据线，源电极和漏电极具有整体形状; 以及使用第二掩模对所述金属层进行第二蚀刻操作以分割所述源电极和所述漏电极。

公开(公告)号：US06802949B2

公开(公告)日：2004-10-12

申请号：US10269865

申请日：2002-10-15

申请人： Jin Pyo Hong ,  Chang Hyo Lee ,  Chae Ok Kim ,  Kap Soo Yoon ,  Sung Bok Lee

发明人： Jin Pyo Hong ,  Chang Hyo Lee ,  Chae Ok Kim ,  Kap Soo Yoon ,  Sung Bok Lee

IPC分类号： C23C1435

CPC分类号： H01J37/3447 ,  C23C14/0036 ,  C23C14/085 ,  C23C14/3471 ,  H01J37/3402

摘要： Disclosed are a method for manufacturing a half-metallic magnetic oxide and a plasma sputtering apparatus used in the method. A conductor provided with at least one hole is disposed between a metal target and a substrate holder in the plasma sputtering apparatus, thereby improving the bonding of metal ions discharged from the metal target to oxygen ions, and a magnetic field with a coercive force larger than that of a thin film to be formed on the substrate, thereby obtaining a magnetic oxide film with excellent properties. In a preferred embodiment of the present invention, a conductor-side power supply unit is connected to the conductor, thereby additionally supplying power to the conductor and generating second plasma. The plasma sputtering apparatus supplies high power so as to decompose oxygen, and discharges metal ions with different electrovalences at a precise ratio by the additional power supply, thereby being effectively used in manufacturing a half-metallic oxide at low temperatures.

摘要翻译： 公开了一种制造半金属磁性氧化物的方法和用于该方法的等离子体溅射装置。 设置有至少一个孔的导体设置在等离子体溅射装置中的金属靶和衬底保持器之间，从而改善从金属靶释放的金属离子与氧离子的结合，以及矫顽力大于 在基板上形成薄膜的薄膜，从而获得具有优异性能的磁性氧化膜。 在本发明的优选实施例中，导体侧电源单元连接到导体，从而另外向导体供电并产生第二等离子体。 等离子体溅射装置提供高功率以分解氧气，并通过附加电源以精确的比例以不同电价排出金属离子，从而有效地用于在低温下制造半金属氧化物。