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公开(公告)号:US20100163823A1
公开(公告)日:2010-07-01
申请号:US12649413
申请日:2009-12-30
申请人: Hyun-Jun Sim , Han-Sin Lee , In-Gyu Baek , Jinshi Zhao , Eun-Kyung Yim
发明人: Hyun-Jun Sim , Han-Sin Lee , In-Gyu Baek , Jinshi Zhao , Eun-Kyung Yim
IPC分类号: H01L47/00
CPC分类号: G11C13/0007 , G11C11/5685 , G11C13/0069 , G11C2013/0071 , G11C2213/15 , G11C2213/32 , G11C2213/34 , G11C2213/55 , G11C2213/77 , G11C2213/79 , H01L27/2436 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1608
摘要: A resistive memory device includes a first electrode, a resistive oxidation structure and a second electrode. The resistive oxidation structure has sets of oxidation layers stacked on the first electrode. Each set is made up of a first metal oxide layer and a second metal oxide layer which is disposed on and is thinner than the first metal oxide layer. The first metal oxidation layer of the first one of the sets of oxidation layers contacts an upper surface of the first electrode. The second electrode is formed on the resistive oxidation structure. The resistance of the oxidation structure can be changed by an electric field
摘要翻译: 电阻式存储器件包括第一电极,电阻氧化结构和第二电极。 电阻氧化结构具有堆叠在第一电极上的一组氧化层。 每组由第一金属氧化物层和设置在第一金属氧化物层上且比第一金属氧化物层薄的第二金属氧化物层组成。 第一组氧化层中的第一金属氧化层接触第一电极的上表面。 第二电极形成在电阻氧化结构上。 氧化结构的电阻可以通过电场来改变
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公开(公告)号:US20100108972A1
公开(公告)日:2010-05-06
申请号:US12611135
申请日:2009-11-03
申请人: Jinshi Zhao , Hyung-Ik Lee , Seong-Ho Moon , In-Gyu Baek , Hyun-Jun Sim , Eun-Kyung Yim
发明人: Jinshi Zhao , Hyung-Ik Lee , Seong-Ho Moon , In-Gyu Baek , Hyun-Jun Sim , Eun-Kyung Yim
IPC分类号: H01L47/00
CPC分类号: G11C13/0011 , B82Y10/00 , G11C13/025 , G11C2213/15 , G11C2213/34 , G11C2213/72 , G11C2213/79 , H01L45/08 , H01L45/1233 , H01L45/141 , H01L45/145 , H01L45/149
摘要: A non-volatile semiconductor memory device includes a lower electrode, an upper electrode, a resistive layer pattern between the lower electrode and the upper electrode, and a filament seed embedded in the resistive layer pattern. The filament seed includes at least one of a carbon nanotube, a nanowire and a nanoparticle.
摘要翻译: 非易失性半导体存储器件包括下电极,上电极,下电极和上电极之间的电阻层图案,以及嵌入电阻层图案中的细丝晶种。 长丝种子包括碳纳米管,纳米线和纳米粒子中的至少一种。
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公开(公告)号:US08148765B2
公开(公告)日:2012-04-03
申请号:US12649413
申请日:2009-12-30
申请人: Hyun-Jun Shim , Han-Sin Lee , In-Gyu Baek , Jinshi Zhao , Eun-Kyung Yim
发明人: Hyun-Jun Shim , Han-Sin Lee , In-Gyu Baek , Jinshi Zhao , Eun-Kyung Yim
IPC分类号: H01L27/108
CPC分类号: G11C13/0007 , G11C11/5685 , G11C13/0069 , G11C2013/0071 , G11C2213/15 , G11C2213/32 , G11C2213/34 , G11C2213/55 , G11C2213/77 , G11C2213/79 , H01L27/2436 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1608
摘要: A resistive memory device includes a first electrode, a resistive oxidation structure and a second electrode. The resistive oxidation structure has sets of oxidation layers stacked on the first electrode. Each set is made up of a first metal oxide layer and a second metal oxide layer which is disposed on and is thinner than the first metal oxide layer. The first metal oxidation layer of the first one of the sets of oxidation layers contacts an upper surface of the first electrode. The second electrode is formed on the resistive oxidation structure. The resistance of the oxidation structure can be changed by an electric field.
摘要翻译: 电阻式存储器件包括第一电极,电阻氧化结构和第二电极。 电阻氧化结构具有堆叠在第一电极上的一组氧化层。 每组由第一金属氧化物层和设置在第一金属氧化物层上且比第一金属氧化物层薄的第二金属氧化物层组成。 第一组氧化层中的第一金属氧化层接触第一电极的上表面。 第二电极形成在电阻氧化结构上。 氧化结构的电阻可以通过电场来改变。
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公开(公告)号:US20100289084A1
公开(公告)日:2010-11-18
申请号:US12777683
申请日:2010-05-11
申请人: Hong Sik Yoon , Jinshi Zhao , Ingyu Baek , Hyun Jun Sim , Minyoung Park
发明人: Hong Sik Yoon , Jinshi Zhao , Ingyu Baek , Hyun Jun Sim , Minyoung Park
IPC分类号: H01L29/78
CPC分类号: H01L27/228 , H01L27/0207 , H01L27/2454 , H01L27/249
摘要: Provided is a semiconductor memory device. The semiconductor memory device may include a local bitline extending in a direction substantially vertical to an upper surface of a semiconductor substrate and a local wordline intersecting the local bitline. The local bitline is electrically connected to a bitline channel pillar penetrating a gate of a bitline transistor, and the local wordline is electrically connected to a wordline channel pillar penetrating a gate of a wordline transistor.
摘要翻译: 提供了一种半导体存储器件。 半导体存储器件可以包括在基本上垂直于半导体衬底的上表面的方向上延伸的局部位线和与局部位线相交的局部字线。 局部位线电连接到贯穿位线晶体管的栅极的位线通道柱,并且本地字线电连接到贯穿字线晶体管的栅极的字线通道柱。
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公开(公告)号:US08264018B2
公开(公告)日:2012-09-11
申请号:US12777683
申请日:2010-05-11
申请人: Hong Sik Yoon , Jinshi Zhao , Ingyu Baek , Hyun Jun Sim , Minyoung Park
发明人: Hong Sik Yoon , Jinshi Zhao , Ingyu Baek , Hyun Jun Sim , Minyoung Park
IPC分类号: H01L29/80
CPC分类号: H01L27/228 , H01L27/0207 , H01L27/2454 , H01L27/249
摘要: Provided is a semiconductor memory device. The semiconductor memory device may include a local bitline extending in a direction substantially vertical to an upper surface of a semiconductor substrate and a local wordline intersecting the local bitline. The local bitline is electrically connected to a bitline channel pillar penetrating a gate of a bitline transistor, and the local wordline is electrically connected to a wordline channel pillar penetrating a gate of a wordline transistor.
摘要翻译: 提供了一种半导体存储器件。 半导体存储器件可以包括在基本上垂直于半导体衬底的上表面的方向上延伸的局部位线和与局部位线相交的局部字线。 局部位线电连接到贯穿位线晶体管的栅极的位线通道柱,并且本地字线电连接到贯穿字线晶体管的栅极的字线通道柱。
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公开(公告)号:US20120306004A1
公开(公告)日:2012-12-06
申请号:US13585119
申请日:2012-08-14
申请人: Hong Sik Yoon , Jinshi Zhao , Ingyu Baek , Hyun Jun Sim , Minyoung Park
发明人: Hong Sik Yoon , Jinshi Zhao , Ingyu Baek , Hyun Jun Sim , Minyoung Park
IPC分类号: H01L29/78
CPC分类号: H01L27/228 , H01L27/0207 , H01L27/2454 , H01L27/249
摘要: Provided is a semiconductor memory device. The semiconductor memory device may include a local bitline extending in a direction substantially vertical to an upper surface of a semiconductor substrate and a local wordline intersecting the local bitline. The local bitline is electrically connected to a bitline channel pillar penetrating a gate of a bitline transistor, and the local wordline is electrically connected to a wordline channel pillar penetrating a gate of a wordline transistor.
摘要翻译: 提供了一种半导体存储器件。 半导体存储器件可以包括在基本上垂直于半导体衬底的上表面的方向上延伸的局部位线和与局部位线相交的局部字线。 局部位线电连接到贯穿位线晶体管的栅极的位线通道柱,并且本地字线电连接到贯穿字线晶体管的栅极的字线通道柱。
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公开(公告)号:US20100271862A1
公开(公告)日:2010-10-28
申请号:US12765411
申请日:2010-04-22
申请人: HongSik Yoon , Jinshi Zhao , Ingyu Baek , Hyunjun Sim , Minyoung Park
发明人: HongSik Yoon , Jinshi Zhao , Ingyu Baek , Hyunjun Sim , Minyoung Park
CPC分类号: G11C8/10 , G11C8/12 , G11C11/1653 , G11C11/1673 , G11C11/1675 , G11C13/0004 , G11C13/0007 , G11C2213/15 , G11C2213/32 , G11C2213/34 , G11C2213/71 , G11C2213/72 , G11C2213/77
摘要: A nonvolatile memory device includes resistive memory devices in a three-dimensional structure. A block select circuit generates a block select signal for selecting a memory block. In response to the block select signal, local word line selection units connected to each memory block connect global word lines connected to a word line decoder and local word lines, and local bit line selection units connected to each memory block connect global bit lines connected to a sense amplifier and local bit lines. Each memory block includes local word lines which extend in a first direction and are stacked in a second direction perpendicular to the first direction on a second plane perpendicular to a first plane. Local bit lines extend in the second direction to cross local word lines. Memory cells are formed at cross-points where local word lines and local bit lines cross one another.
摘要翻译: 非易失性存储器件包括三维结构中的电阻式存储器件。 块选择电路产生用于选择存储块的块选择信号。 响应于块选择信号,连接到每个存储器块的局部字线选择单元连接连接到字线解码器和本地字线的全局字线,并且连接到每个存储器块的局部位线选择单元将连接到 一个读出放大器和本地位线。 每个存储块包括在垂直于第一平面的第二平面上沿第一方向延伸并且沿垂直于第一方向的第二方向堆叠的局部字线。 局部位线在第二个方向上延伸以跨越局部字线。 存储单元在本地字线和局部位线交叉的交点处形成。
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公开(公告)号:US08581346B2
公开(公告)日:2013-11-12
申请号:US12822302
申请日:2010-06-24
申请人: HongSik Yoon , Jinshi Zhao , Ingyu Baek , Hyunjun Sim , Minyoung Park
发明人: HongSik Yoon , Jinshi Zhao , Ingyu Baek , Hyunjun Sim , Minyoung Park
IPC分类号: H01L21/8229 , H01L27/108 , H01L27/11
CPC分类号: H01L21/8229 , H01L27/224 , H01L27/2409 , H01L45/04 , H01L45/06 , H01L45/085 , H01L45/1233 , H01L45/1273 , H01L45/144 , H01L45/145
摘要: A semiconductor memory device includes a first conductive line, a second conductive line crossing over the first conductive line, a resistance variation part disposed at a position in which the second conductive line intersects with the first conductive line and electrically connected to the first conductive line and the second conductive line and a mechanical switch disposed between the resistance variation part and the second conductive line. The mechanical switch includes a nanotube.
摘要翻译: 半导体存储器件包括第一导线,与第一导线交叉的第二导线,设置在第二导线与第一导线相交并与第一导线相连的位置处的电阻变化部,以及 所述第二导线和设置在所述电阻变化部和所述第二导线之间的机械开关。 机械开关包括纳米管。
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公开(公告)号:US08331152B2
公开(公告)日:2012-12-11
申请号:US12765411
申请日:2010-04-22
申请人: HongSik Yoon , Jinshi Zhao , Ingyu Baek , Hyunjun Sim , Minyoung Park
发明人: HongSik Yoon , Jinshi Zhao , Ingyu Baek , Hyunjun Sim , Minyoung Park
IPC分类号: G11C11/34
CPC分类号: G11C8/10 , G11C8/12 , G11C11/1653 , G11C11/1673 , G11C11/1675 , G11C13/0004 , G11C13/0007 , G11C2213/15 , G11C2213/32 , G11C2213/34 , G11C2213/71 , G11C2213/72 , G11C2213/77
摘要: A nonvolatile memory device includes resistive memory devices in a three-dimensional structure. A block select circuit generates a block select signal for selecting a memory block. In response to the block select signal, local word line selection units connected to each memory block connect global word lines connected to a word line decoder and local word lines, and local bit line selection units connected to each memory block connect global bit lines connected to a sense amplifier and local bit lines. Each memory block includes local word lines which extend in a first direction and are stacked in a second direction perpendicular to the first direction on a second plane perpendicular to a first plane. Local bit lines extend in the second direction to cross local word lines. Memory cells are formed at cross-points where local word lines and local bit lines cross one another.
摘要翻译: 非易失性存储器件包括三维结构中的电阻式存储器件。 块选择电路产生用于选择存储块的块选择信号。 响应于块选择信号,连接到每个存储器块的局部字线选择单元连接连接到字线解码器和本地字线的全局字线,并且连接到每个存储器块的局部位线选择单元将连接到 一个读出放大器和本地位线。 每个存储块包括在垂直于第一平面的第二平面上沿第一方向延伸并且沿垂直于第一方向的第二方向堆叠的局部字线。 局部位线在第二个方向上延伸以跨越局部字线。 存储单元在本地字线和局部位线交叉的交点处形成。
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公开(公告)号:US20110012081A1
公开(公告)日:2011-01-20
申请号:US12822302
申请日:2010-06-24
申请人: HongSik YOON , Jinshi Zhao , Ingyu Baek , Hyunjun Sim , MInyoung Park
发明人: HongSik YOON , Jinshi Zhao , Ingyu Baek , Hyunjun Sim , MInyoung Park
CPC分类号: H01L21/8229 , H01L27/224 , H01L27/2409 , H01L45/04 , H01L45/06 , H01L45/085 , H01L45/1233 , H01L45/1273 , H01L45/144 , H01L45/145
摘要: A semiconductor memory device includes a first conductive line, a second conductive line crossing over the first conductive line, a resistance variation part disposed at a position in which the second conductive line intersects with the first conductive line and electrically connected to the first conductive line and the second conductive line and a mechanical switch disposed between the resistance variation part and the second conductive line. The mechanical switch includes a nanotube.
摘要翻译: 半导体存储器件包括第一导线,与第一导线交叉的第二导线,设置在第二导线与第一导线相交并与第一导线相连的位置处的电阻变化部,以及 所述第二导线和设置在所述电阻变化部和所述第二导线之间的机械开关。 机械开关包括纳米管。
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