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1.发明申请公开(公告)号：US20140311772A1
公开(公告)日：2014-10-23
申请号：US14255986
申请日：2014-04-18
Applicant: IBIDEN CO., LTD.
Inventor： Yoshio MIZUTANI , Hiroaki WATANABE
CPC classification number: H05K3/462 , H01L23/49827 , H01L2924/0002 , H05K3/429 , H05K3/4602 , H05K2201/09509 , H05K2201/0959 , H05K2203/1476 , Y10T29/49165 , H01L2924/00
Abstract: A printed wiring board includes: a multilayer core substrate including first and second insulation layers and a double-sided board between the first and second insulation layers. The core substrate has a cylindrical through-hole structure including a cylindrical conductor through the insulation layers and the board, a resin filler filling inside the cylindrical conductor and covering circuits covering the filler at the ends of the cylindrical conductor, respectively. The core substrate includes a conductive layer including a through-hole land around end of the structure such that the land is directly connected to the cylindrical conductor, the land includes a first electroless film, a first electrolytic film, a second electroless film and a second electrolytic film, and the cylindrical conductor includes the second electroless and electrolytic films such that the second electroless film is in contact with the side walls of the first electroless and electrolytic films.
Abstract translation: 印刷电路板包括：包括第一绝缘层和第二绝缘层的多层芯基板和在第一绝缘层和第二绝缘层之间的双面板。 核心基板具有圆柱形通孔结构，其包括穿过绝缘层和板的圆柱形导体，填充在圆柱形导体内部的树脂填料和覆盖圆柱形导体端部的填料的覆盖电路。 核心基板包括导电层，该导电层包括在结构的端部周围的通孔焊盘，使得焊盘直接连接到圆柱形导体，焊盘包括第一化学镀膜，第一电解膜，第二无电镀膜和第二 所述圆筒形导体包括所述第二无电电解膜和所述电解质膜，使得所述第二无电解膜与所述第一无电解电解质膜和所述电解质膜的侧壁接触。
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公开(公告)号：US20250089167A1
公开(公告)日：2025-03-13
申请号：US18882148
申请日：2024-09-11
Applicant: IBIDEN CO., LTD.
Inventor： Shunsuke SAKAI , Yoshio MIZUTANI
Abstract: A wiring substrate includes an insulating layer having through holes, a first conductor layer, a second conductor layer, interlayer conductors formed in the through holes. The interlayer conductors are connecting the first and second conductor layers and include first interlayer conductors formed in first region of the insulating layer and second interlayer conductors formed in second region of the insulating layer at density higher than density of the first interlayer conductors formed in the first region. A thickness of each first interlayer conductor is larger than a thickness of each second interlayer conductor. The insulating layer is formed such that the through holes includes first through holes having the first interlayer conductors formed therein and second through holes having the second interlayer conductors formed therein and that an inner diameter of each of the first through holes is larger than an inner diameter of each of the second through holes.
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公开(公告)号：US20240098897A1
公开(公告)日：2024-03-21
申请号：US18469675
申请日：2023-09-19
Applicant: IBIDEN CO., LTD.
Inventor： Yoshio MIZUTANI
CPC classification number: H05K1/113 , H05K3/0094 , H05K2201/0959 , H05K2201/096 , H05K2201/09618
Abstract: A wiring substrate includes an insulating layer having through holes, a first conductor layer formed on first surface of the insulating layer, a second conductor layer formed on second surface of the insulating layer, and interlayer conductors formed along wall surfaces surrounding the through holes such that each interlayer conductor has a film-like shape and is connecting the first and second conductor layers. The interlayer conductors include first conductors formed in first region of the insulating layer and second conductors formed in second region of the insulating layer at density higher than density of the first conductors, and a thickness of each first interlayer conductor in its end part is substantially same as or larger than a thickness of each second conductor in its end part and a thickness of each first conductor in its center part is larger than a thickness of each second conductor in its center part.
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