公开(公告)号：US20230249176A1

公开(公告)日：2023-08-10

申请号：US18003284

申请日：2022-02-18

Applicant: Illumina, Inc.

Inventor： Jonathan Ziebarth ,  Jon Aday ,  Paul Crivelli ,  Gerald Kreindl ,  Amit Sharma

IPC: B01L3/00 ,  B29C45/14

CPC classification number: B01L3/502707 ,  B29C45/14778 ,  B01L2300/0896 ,  B29C2045/0094

Abstract: Provided herein include various examples of a method for manufacturing aspects of flow cell. The method may include performing chemical processes on a surface of the patterned wafer to prepare the surface of the patterned, singulating the wafer into individual dies, orienting each die on a temporary substrate, where the orienting creates spaces between each individual die, and molding a material over the spaces to create a hybrid wafer comprised of glass and molded material. The method may also include bonding two of the hybrid wafers together, forming a bonded wafer stack.

公开(公告)号：US12296333B2

公开(公告)日：2025-05-13

申请号：US18003284

申请日：2022-02-18

Applicant: Illumina, Inc.

Inventor： Jonathan Ziebarth ,  Jon Aday ,  Paul Crivelli ,  Gerald Kreindl ,  Amit Sharma

IPC: B29C45/14 ,  B01L3/00 ,  B29C45/00

Abstract: Provided herein include various examples of a method for manufacturing aspects of flow cell. The method may include performing chemical processes on a surface of the patterned wafer to prepare the surface of the patterned, singulating the wafer into individual dies, orienting each die on a temporary substrate, where the orienting creates spaces between each individual die, and molding a material over the spaces to create a hybrid wafer comprised of glass and molded material. The method may also include bonding two of the hybrid wafers together, forming a bonded wafer stack.

公开(公告)号：US12009352B2

公开(公告)日：2024-06-11

申请号：US17419385

申请日：2020-09-16

Applicant: ILLUMINA, INC.

Inventor： Arvin Emadi ,  Jon Aday ,  Ali Agah ,  Arnaud Rival

IPC: H01L25/16 ,  G01N21/64 ,  H01L21/304 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L25/167 ,  G01N21/6454 ,  H01L21/304 ,  H01L21/56 ,  H01L21/78 ,  H01L23/3128 ,  H01L24/11 ,  H01L24/13 ,  H01L24/97 ,  H01L2224/02333 ,  H01L2224/02379 ,  H01L2224/13008 ,  H01L2224/13009 ,  H01L2224/97

Abstract: Provided herein include various examples of a method for manufacturing aspects of an apparatus, a sensor system. The method may include obtaining a first carrier bonded to an upper surface of the silicon wafer. This wafer includes through silicon vias (TSVs) extended through openings in a passivation stack, with electrical contacts coupled to portions of the TSVs exposed through these openings. The method may include de-bonding the first carrier from the upper surface of the silicon wafer. The method may include dicing the silicon wafer into subsections comprising dies.