中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

17 records (took 0.02 seconds)

    MODULO DIVIDER AND MODULO DIVISION OPERATION METHOD FOR BINARY DATA
    1.
    发明公开
    MODULO DIVIDER AND MODULO DIVISION OPERATION METHOD FOR BINARY DATA 审中-公开

    公开(公告)号：US20240220210A1

    公开(公告)日：2024-07-04

    申请号：US18152170

    申请日：2023-01-10

    Applicant: Industrial Technology Research Institute

    Inventor： Chia-Hsiang Yang ,  Liang-Hsin Lin ,  Yu-Ling Kang ,  Yu-Hui Lin ,  Chih-Ming Lai

    IPC: G06F7/72 ,  G06F5/01

    CPC classification number: G06F7/729 ,  G06F5/01

    Abstract: A modulo divider and a modulo division operation method for binary data are provided, including: converting a first variant and a second variant to a variant set according to a first mapping table; generating a fifth variant and a sixth variant according to the variant set; generating a seventh variant and an eighth variant according to the variant set; updating the first variant according to one of the fifth variant and the sixth variant and updating the second variant according to the other one of the fifth variant and the sixth variant; updating the third variant according to one of the seventh variant and the eighth variant and updating the fourth variant according to the other one of the seventh variant and the eighth variant; and outputting the third variant as a result of a modulo division operation in response to determining the updating of the third variant being finished.

    Light-emitting device and method of manufacturing light-emitting device
    2.
    发明授权
    Light-emitting device and method of manufacturing light-emitting device 有权

    公开(公告)号：US10249803B2

    公开(公告)日：2019-04-02

    申请号：US15455146

    申请日：2017-03-10

    Applicant: Industrial Technology Research Institute

    Inventor： Hsuan-Yu Lin ,  Ting-Yu Wang ,  Chih-Ming Lai

    IPC: H01L33/38 ,  H01L33/54 ,  H01L33/62

    Abstract: A light-emitting device and a method of manufacturing a light-emitting device are provided. The light-emitting device includes a transparent substrate having a first surface and a second surface opposite to the first surface, a light-emitting structure disposed on the first surface of the transparent substrate, a sealing layer, a carrier board, and a positive electrode and a negative electrode. The transparent substrate, the light-emitting structure, the sealing layer and the carrier board have corresponding through holes respectively, and at least one of the positive electrode and the negative electrode is disposed on the second surface of the transparent substrate.

    Memory circuit with sense amplifier calibration mechanism
    4.
    发明授权
    Memory circuit with sense amplifier calibration mechanism 有权

    公开(公告)号：US12142342B2

    公开(公告)日：2024-11-12

    申请号：US18074528

    申请日：2022-12-05

    Applicant: Industrial Technology Research Institute

    Inventor： Chih-Sheng Lin ,  Fu-Cheng Tsai ,  Tuo-Hung Hou ,  Jian-Wei Su ,  Yu-Hui Lin ,  Chih-Ming Lai

    IPC: G11C7/06 ,  G11C7/10 ,  G11C7/12

    Abstract: According to an exemplary embodiments, the disclosure is directed to a memory circuit which includes not limited to a first half sense amplifier circuit connected to a first plurality of memory cells through a first bit line and configured to receive a unit of analog electrical signal from each of the first plurality of memory cells and to generate a first half sense amplifier output signal corresponding to the first bit line based on a first gain of the half sense amplifier and an accumulation of the units of analog signals, a locking code register circuit configured to receive a locking data and to generate a digital locking sequence, and a source selector circuit configured to receive the digital locking sequence and to generate a first adjustment signal to adjust the first half sense amplifier output signal corresponding to the first bit line by adjusting the first gain.

    COMPUTING CIRCUIT AND DATA COMPUTING METHOD
    7.
    发明申请
    COMPUTING CIRCUIT AND DATA COMPUTING METHOD 有权

    公开(公告)号：US20250103751A1

    公开(公告)日：2025-03-27

    申请号：US18896914

    申请日：2024-09-26

    Applicant: Industrial Technology Research Institute

    Inventor： Bo-Cheng Chiou ,  Chih-Sheng Lin ,  Tuo-Hung Hou ,  Chih-Ming Lai ,  Yun-Ting Ho ,  Shan-Ming Chang

    IPC: G06F21/62 ,  G06F21/72 ,  H04L9/32

    Abstract: A computing circuit with a de-identified architecture, a data computing method, a data processing system, and a data de-identification method are provided. The computing circuit includes an arithmetic array and a de-identification circuit. The computing circuit may perform an accumulation operation on input data to generate accumulated data by the arithmetic array. The de-identification circuit has an analog offset error determined based on an analog physical unclonable function. The computing circuit may operate the accumulated data according to the analog offset error to generate de-identification data by the de-identification circuit. It can not only provide the analog offset error through the transistors in the de-identification circuit, but also be combined with obfuscated code settings to dynamically adjusting the degree of de-identification of data.

    MEMORY CIRCUIT WITH SENSE AMPLIFIER CALIBRATION MECHANISM
    8.
    发明公开
    MEMORY CIRCUIT WITH SENSE AMPLIFIER CALIBRATION MECHANISM 审中-公开

    公开(公告)号：US20230267973A1

    公开(公告)日：2023-08-24

    申请号：US18074528

    申请日：2022-12-05

    Applicant: Industrial Technology Research Institute

    Inventor： Chih-Sheng Lin ,  Fu-Cheng Tsai ,  Tuo-Hung Hou ,  Jian-Wei Su ,  Yu-Hui Lin ,  Chih-Ming Lai

    IPC: G11C7/06 ,  G11C7/12 ,  G11C7/10

    CPC classification number: G11C7/067 ,  G11C7/12 ,  G11C7/1063

    Abstract: According to an exemplary embodiments, the disclosure is directed to a memory circuit which includes not limited to a first half sense amplifier circuit connected to a first plurality of memory cells through a first bit line and configured to receive a unit of analog electrical signal from each of the first plurality of memory cells and to generate a first half sense amplifier output signal corresponding to the first bit line based on a first gain of the half sense amplifier and an accumulation of the units of analog signals, a locking code register circuit configured to receive a locking data and to generate a digital locking sequence, and a source selector circuit configured to receive the digital locking sequence and to generate a first adjustment signal to adjust the first half sense amplifier output signal corresponding to the first bit line by adjusting the first gain.

    Organic light-emitting device
    9.
    发明授权
    Organic light-emitting device 有权

    公开(公告)号：US09865671B2

    公开(公告)日：2018-01-09

    申请号：US15255156

    申请日：2016-09-02

    Applicant: Industrial Technology Research Institute

    Inventor： Hsi-Hsuan Yen ,  Wen-Yung Yeh ,  Je-Ping Hu ,  Yuan-Shan Chung ,  Chih-Ming Lai ,  Hsuan-Yu Lin ,  Wen-Hong Liu ,  Hsin-Chu Chen ,  Chun-Ting Liu

    IPC: H01L27/32 ,  H01L23/525

    CPC classification number: H01L27/3276 ,  H01L23/5256 ,  H01L27/3202 ,  H01L27/3288 ,  H01L51/5203 ,  H01L2251/5361 ,  H01L2251/568

    Abstract: An organic light-emitting device includes a first substrate, a light-emitting structure layer, a first electrode layer, a second electrode layer, a second substrate, first conduction members, a second conduction member and protection structures. The light-emitting structure layer is disposed on the first substrate. The first electrode layer is disposed on the light-emitting structure layer and includes pad-like patterns. The second electrode layer is disposed between the light-emitting structure layer and the first substrate. The second substrate is adhered on the first electrode layer and includes a first circuit and a second circuit. The first circuit includes a continuous pattern and contact portions. The first conduction members are connected between the first circuit and the first electrode layer. The second conduction member is connected between the second circuit and the second electrode layer. The protection structures respectively form open circuits or close circuits between the contact portions and the continuous pattern.

Patent Agency Ranking