公开(公告)号：US20140117511A1

公开(公告)日：2014-05-01

申请号：US13664311

申请日：2012-10-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Kurt Matoy ,  Hubert Maier ,  Christian Krenn ,  Elfriede Kraxner Wellenzohn ,  Helmut Schoenherr ,  Juergen Steinbrenner ,  Markus Kahn ,  Fister Schlemitz Silvana ,  Christoph Brunner ,  Herbert Gietler ,  Uwe Hoeckele

IPC: H01L21/31 ,  H01L29/00

CPC classification number: H01L23/3171 ,  H01L21/0206 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02274 ,  H01L21/02334 ,  H01L21/0234 ,  H01L21/76801 ,  H01L23/291

Abstract: A passivation layer and a method of making a passivation layer are disclosed. In one embodiment the method for manufacturing a passivation layer includes depositing a first silicon based dielectric layer on a workpiece, the first silicon based dielectric layer comprising nitrogen, and depositing in-situ a second silicon based dielectric layer on the first silicon based dielectric layer, the second dielectric layer comprising oxygen.

Abstract translation: 公开了钝化层和制备钝化层的方法。 在一个实施例中，制造钝化层的方法包括在工件上沉积第一硅基电介质层，第一硅基电介质层包含氮，并在第一硅基电介质层上原位沉积第二硅基电介质层， 所述第二电介质层包含氧。

公开(公告)号：US09698247B2

公开(公告)日：2017-07-04

申请号：US15071962

申请日：2016-03-16

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Manfred Kotek ,  Johannes Baumgartl ,  Markus Harfmann ,  Christian Krenn ,  Thomas Neidhart

IPC: H01L21/20 ,  H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L29/161 ,  H01L29/167 ,  H01L29/207 ,  H01L21/225 ,  H01L21/683 ,  H01L29/10 ,  H01L21/324 ,  H01L29/08 ,  H01L29/16 ,  H01L29/20

CPC classification number: H01L29/7802 ,  H01L21/2251 ,  H01L21/3247 ,  H01L21/6835 ,  H01L29/0634 ,  H01L29/0873 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/167 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/66712 ,  H01L2221/68345

Abstract: A semiconductor arrangement is produced by providing a semiconductor carrier of a second conduction type and epitaxially growing a first semiconductor zone of a first conduction type on the carrier. The first semiconductor zone includes a semiconductor base material doped with first and second dopants which are made of different substances which are both different from the semiconductor base material. The first dopant is electrically active and causes a doping of the first conduction type in the semiconductor base material, and causes a decrease or an increase of a lattice constant of the first semiconductor zone. The second dopant causes one or both of hardening of the first semiconductor zone and an increase of the lattice constant of the first semiconductor zone if the first dopant causes a decrease, or a decrease of the lattice constant of the first semiconductor zone if the first dopant causes an increase.

公开(公告)号：US20160197164A1

公开(公告)日：2016-07-07

申请号：US15071962

申请日：2016-03-16

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Manfred Kotek ,  Johannes Baumgartl ,  Markus Harfmann ,  Christian Krenn ,  Thomas Neidhart

IPC: H01L29/66 ,  H01L29/10 ,  H01L21/683 ,  H01L21/225 ,  H01L29/08 ,  H01L29/167 ,  H01L29/06

CPC classification number: H01L29/7802 ,  H01L21/2251 ,  H01L21/3247 ,  H01L21/6835 ,  H01L29/0634 ,  H01L29/0873 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/167 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/66712 ,  H01L2221/68345

Abstract: A semiconductor arrangement is produced by providing a semiconductor carrier of a second conduction type and epitaxially growing a first semiconductor zone of a first conduction type on the carrier. The first semiconductor zone includes a semiconductor base material doped with first and second dopants which are made of different substances which are both different from the semiconductor base material. The first dopant is electrically active and causes a doping of the first conduction type in the semiconductor base material, and causes a decrease or an increase of a lattice constant of the first semiconductor zone. The second dopant causes one or both of hardening of the first semiconductor zone and an increase of the lattice constant of the first semiconductor zone if the first dopant causes a decrease, or a decrease of the lattice constant of the first semiconductor zone if the first dopant causes an increase.

Abstract translation: 通过提供第二导电类型的半导体载体并在载体上外延生长第一导电类型的第一半导体区域来制造半导体装置。 第一半导体区域包括掺杂有不同于半导体基底材料的不同物质的第一和第二掺杂剂的半导体基底材料。 第一掺杂剂是电活性的并且导致半导体基底材料中的第一导电类型的掺杂，并且引起第一半导体区域的晶格常数的减小或增加。 如果第一掺杂剂引起第一掺杂剂引起的第一掺杂剂导致第一掺杂剂的晶格常数降低或者第一掺杂物的晶格常数的降低，则第二掺杂物引起第一半导体区域的硬化和第一半导体区域的晶格常数的增加， 导致增加。

公开(公告)号：US20150235917A1

公开(公告)日：2015-08-20

申请号：US14699704

申请日：2015-04-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Kurt Matoy ,  Hubert Maier ,  Christian Krenn ,  Elfriede Kraxner Wellenzohn ,  Helmut Schoenherr ,  Juergen Steinbrenner ,  Markus Kahn ,  Silvana Fister ,  Christoph Brunner ,  Herbert Gietler ,  Uwe Hoeckele

IPC: H01L23/31 ,  H01L23/29 ,  H01L21/02

CPC classification number: H01L23/3171 ,  H01L21/0206 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02274 ,  H01L21/02334 ,  H01L21/0234 ,  H01L21/76801 ,  H01L23/291

Abstract: A passivation layer and a method of making a passivation layer are disclosed. In one embodiment the method for manufacturing a passivation layer includes depositing a first silicon based dielectric layer on a workpiece, the first silicon based dielectric layer comprising nitrogen, and depositing in-situ a second silicon based dielectric layer on the first silicon based dielectric layer, the second dielectric layer comprising oxygen.

Abstract translation: 公开了钝化层和制备钝化层的方法。 在一个实施例中，制造钝化层的方法包括在工件上沉积第一硅基电介质层，第一硅基电介质层包含氮，并在第一硅基电介质层上原位沉积第二硅基电介质层， 所述第二电介质层包含氧。

公开(公告)号：US09728480B2

公开(公告)日：2017-08-08

申请号：US14699704

申请日：2015-04-29

Applicant: Infineon Technologies AG

Inventor： Kurt Matoy ,  Hubert Maier ,  Christian Krenn ,  Elfriede Kraxner Wellenzohn ,  Helmut Schoenherr ,  Juergen Steinbrenner ,  Markus Kahn ,  Silvana Fister ,  Christoph Brunner ,  Herbert Gietler ,  Uwe Hoeckele

IPC: H01L21/3105 ,  H01L23/31 ,  H01L21/02 ,  H01L23/29

CPC classification number: H01L23/3171 ,  H01L21/0206 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02274 ,  H01L21/02334 ,  H01L21/0234 ,  H01L21/76801 ,  H01L23/291

Abstract: A passivation layer and a method of making a passivation layer are disclosed. In one embodiment the method for manufacturing a passivation layer includes depositing a first silicon based dielectric layer on a workpiece, the first silicon based dielectric layer comprising nitrogen, and depositing in-situ a second silicon based dielectric layer on the first silicon based dielectric layer, the second dielectric layer comprising oxygen.