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    Method of Producing a Semiconductor Arrangement
    1.
    发明申请
    Method of Producing a Semiconductor Arrangement 有权
    制造半导体装置的方法

    公开(公告)号：US20160197164A1

    公开(公告)日：2016-07-07

    申请号：US15071962

    申请日：2016-03-16

    Applicant: Infineon Technologies AG

    Inventor： Hans-Joachim Schulze ,  Manfred Kotek ,  Johannes Baumgartl ,  Markus Harfmann ,  Christian Krenn ,  Thomas Neidhart

    IPC: H01L29/66 ,  H01L29/10 ,  H01L21/683 ,  H01L21/225 ,  H01L29/08 ,  H01L29/167 ,  H01L29/06

    CPC classification number: H01L29/7802 ,  H01L21/2251 ,  H01L21/3247 ,  H01L21/6835 ,  H01L29/0634 ,  H01L29/0873 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/167 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/66712 ,  H01L2221/68345

    Abstract: A semiconductor arrangement is produced by providing a semiconductor carrier of a second conduction type and epitaxially growing a first semiconductor zone of a first conduction type on the carrier. The first semiconductor zone includes a semiconductor base material doped with first and second dopants which are made of different substances which are both different from the semiconductor base material. The first dopant is electrically active and causes a doping of the first conduction type in the semiconductor base material, and causes a decrease or an increase of a lattice constant of the first semiconductor zone. The second dopant causes one or both of hardening of the first semiconductor zone and an increase of the lattice constant of the first semiconductor zone if the first dopant causes a decrease, or a decrease of the lattice constant of the first semiconductor zone if the first dopant causes an increase.

    Abstract translation: 通过提供第二导电类型的半导体载体并在载体上外延生长第一导电类型的第一半导体区域来制造半导体装置。 第一半导体区域包括掺杂有不同于半导体基底材料的不同物质的第一和第二掺杂剂的半导体基底材料。 第一掺杂剂是电活性的并且导致半导体基底材料中的第一导电类型的掺杂，并且引起第一半导体区域的晶格常数的减小或增加。 如果第一掺杂剂引起第一掺杂剂引起的第一掺杂剂导致第一掺杂剂的晶格常数降低或者第一掺杂物的晶格常数的降低，则第二掺杂物引起第一半导体区域的硬化和第一半导体区域的晶格常数的增加， 导致增加。

    SEMICONDUCTOR DEVICE
    6.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号：US20140021637A1

    公开(公告)日：2014-01-23

    申请号：US14037057

    申请日：2013-09-25

    Applicant: Infineon Technologies AG

    Inventor： Walter Rieger ,  Franz Hirler ,  Martin Poelzl ,  Manfred Kotek

    IPC: H01L23/48

    CPC classification number: H01L23/481 ,  H01L21/76838 ,  H01L21/76895 ,  H01L23/485 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A semiconductor device includes a semiconductor substrate, a doped zone, a polysilicon layer and an elongate plug structure. The doped zone is within the semiconductor substrate. The polysilicon layer is disposed in a trench electrically isolated from the semiconductor substrate by an insulating layer. The elongate plug structure extends in a lateral direction in or above the semiconductor substrate. The elongate plug structure provides electrical connection between the doped zone and the polysilicon layer.

    Abstract translation: 半导体器件包括半导体衬底，掺杂区，多晶硅层和细长插塞结构。 掺杂区在半导体衬底内。 多晶硅层通过绝缘层设置在与半导体衬底电隔离的沟槽中。 细长插头结构在半导体衬底中或其上方在横向方向上延伸。 细长塞结构提供掺杂区和多晶硅层之间的电连接。

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