公开(公告)号：US09258138B2

公开(公告)日：2016-02-09

申请号：US14139807

申请日：2013-12-23

Applicant: Intel Corporation

Inventor： William Dawson Kesling

IPC: H04B1/12 ,  H04L12/40 ,  H04L1/00 ,  H04L25/08

CPC classification number: H04L12/40032 ,  H04B1/12 ,  H04L1/0011 ,  H04L25/08

Abstract: An integrated circuit chip can include an interference mitigator. The interference mitigator can be to modify encoding to generate a cancellation pattern for optimum cancellation of radio frequency interference (RFI) at the effective mid-point of the data bus. The interference mitigator can also be to transmit the generated cancellation pattern across the data bus to cancel the radio frequency interference.

Abstract translation: 集成电路芯片可以包括干扰减轻器。 干扰减轻器可以是修改编码以产生用于在数据总线的有效中点处的射频干扰（RFI）的最佳消除的消除模式。 干扰减轻器也可以是通过数据总线发送所生成的消除模式以消除射频干扰。

公开(公告)号：US09438283B2

公开(公告)日：2016-09-06

申请号：US14286452

申请日：2014-05-23

Applicant: INTEL CORPORATION

Inventor： William Dawson Kesling ,  Hossein Alavi

IPC: H04B1/10 ,  H04B1/12

CPC classification number: H04B1/10 ,  H04B1/1036 ,  H04B1/123

Abstract: An apparatus that enables baseband time domain cancellation of data bus interference is described herein. The apparatus includes a wireless receiver and a cancellator. The cancellator is to determine an estimate of wireless interference in a baseband time domain on data to be received by the wireless receiver and to subtract the estimate of wireless interference from the data.

Abstract translation: 本文描述了使基带时域消除数据总线干扰的装置。 该装置包括无线接收器和消除器。 消除器是确定基带时域中无线接收器要接收的数据上的无线干扰的估计，并从数据中减去无线干扰的估计。

公开(公告)号：US09755865B2

公开(公告)日：2017-09-05

申请号：US14140588

申请日：2013-12-26

Applicant: Intel Corporation

Inventor： William Dawson Kesling ,  Andrew W. Martwick

IPC: H04B1/10 ,  H04L25/08 ,  H04B15/06

CPC classification number: H04L25/08

Abstract: A computing device can include a radio receiver to receive a radio signal from a radio transmitter of a second computing or communication device. The radio receiver can experience radio frequency interference. The computing device can also include a digital signal generator. The digital signal generator can be to process a signal (S1) underlying a source of the radio frequency interference. The digital signal generator can also be to generate a digital signal (S1). The digital signal generator can further be to inject the digital signal (S1) into the radio receiver to cancel the radio frequency interference around the radio frequency of interest.

公开(公告)号：US09696350B2

公开(公告)日：2017-07-04

申请号：US13907802

申请日：2013-05-31

Applicant: INTEL CORPORATION

Inventor： Edward A. Burton ,  Gerhard Schrom ,  Michael W. Rogers ,  Alexander Lyakhov ,  Ravi Sankar Vunnam ,  Jonathan P. Douglas ,  Fabrice Paillet ,  J. Keith Hodgson ,  William Dawson Kesling ,  Chiu Keung Tang ,  Narayanan Raghuraman ,  Narayanan Natarajan ,  Samie Samaan ,  George Geannopoulos

IPC: H02M3/157 ,  G01R19/00 ,  H03L5/00 ,  H03M1/66 ,  G06T3/40 ,  H02M3/156 ,  H02M1/088 ,  H02M3/158 ,  H03M1/68 ,  H02M1/00

CPC classification number: G01R19/0092 ,  G06T3/40 ,  H02M1/088 ,  H02M3/156 ,  H02M3/157 ,  H02M3/158 ,  H02M2001/0009 ,  H02M2003/1566 ,  H03L5/00 ,  H03M1/66 ,  H03M1/685

Abstract: Described is an apparatus having a non-linear control to manage power supply droop at an output of a voltage regulator. The apparatus comprises: a first inductor for coupling to a load; a capacitor, coupled to the first inductor, and for coupling to the load; a first high-side switch couple to the first inductor; a first low-side switch coupled to the first inductor; a bridge controller to control when to turn on and off the first high-side and first low-side switches; and a non-linear control (NLC) unit to monitor output voltage on the load, and to cause the bridge controller to turn on the first high-side switch and turn off the first low-side switch when a voltage droop is detected on the load.

公开(公告)号：US09251110B2

公开(公告)日：2016-02-02

申请号：US14140386

申请日：2013-12-24

Applicant: Intel Corporation

Inventor： William Dawson Kesling ,  Andrew W. Martwick

IPC: H04K1/02 ,  G06F13/40 ,  H03K19/003 ,  H04L1/20

CPC classification number: G06F13/4086 ,  H03K19/00346 ,  H04L1/20 ,  Y02D10/14 ,  Y02D10/151

Abstract: Techniques for reducing the spectral content of a data bus are described herein. An example of a device in accordance with the present techniques includes logic to obtain a present bit of data to be transmitted over a data bus and estimate a spectral energy contribution of the present bit at a frequency of interest. The device also includes logic to determine what effect inverting the present bit will have on a net spectral energy of the data bus at the frequency of interest when the present bit is transmitted over the data bus. The device also includes logic to invert the present bit to generate an inverted bit and transmit the inverted bit over the data bus if inverting the present bit reduces the net spectral energy of the data bus at the frequency of interest.

Abstract translation: 本文描述了用于降低数据总线的频谱内容的技术。 根据本技术的设备的示例包括获得要在数据总线上传输的数据的当前位并且以感兴趣的频率估计当前位的频谱能量贡献的逻辑。 当当前位通过数据总线发送时，该装置还包括确定当前位将反转当前位置在数据总线的净频谱能量上的效果的逻辑。 该器件还包括用于反转当前位以产生反相位的逻辑，并且通过数据总线发送反相位，如果反相当前位以感兴趣的频率降低数据总线的净频谱能量。