公开(公告)号：US11193961B2

公开(公告)日：2021-12-07

申请号：US16866347

申请日：2020-05-04

Applicant: Intel Corporation

Inventor： Gerhard Schrom ,  J. Keith Hodgson ,  Alexander Lyakhov ,  Chiu Keung Tang ,  Narayanan Raghuraman ,  Narayanan Natarajan

IPC: H03M1/66 ,  G01R19/00 ,  H02M3/157 ,  H02M3/156 ,  H03L5/00 ,  G06T3/40 ,  H02M1/088 ,  H02M3/158 ,  H03M1/68 ,  H02M1/00

Abstract: Apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, a plurality of inductors is coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge

公开(公告)号：US10184961B2

公开(公告)日：2019-01-22

申请号：US15276697

申请日：2016-09-26

Applicant: Intel Corporation

Inventor： Gerhard Schrom ,  J. Keith Hodgson ,  Alexander Lyakhov ,  Chiu Keung Tang ,  Narayanan Raghuraman ,  Narayanan Natarajan

IPC: H03M1/66 ,  G01R19/00 ,  H02M3/157 ,  H03L5/00 ,  G06T3/40 ,  H02M3/156 ,  H02M1/088 ,  H02M3/158 ,  H03M1/68 ,  H02M1/00

Abstract: Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.

公开(公告)号：US10033402B2

公开(公告)日：2018-07-24

申请号：US15265730

申请日：2016-09-14

Applicant: Intel Corporation

Inventor： Takao Oshita ,  George L. Geannopoulos ,  David E. Duarte ,  J. Keith Hodgson ,  James S. Ayers ,  Avner Kornfeld ,  Jonathan P. Douglas

IPC: H03M3/00 ,  H03M1/00 ,  H03M1/12 ,  H03M1/80

Abstract: Described is an analog to digital converter (ADC) which comprises: a sigma-delta modulator to receive an analog signal, the sigma-delta modulator operable to perform chopping to cancel common-mode noise; and one or more counters coupled to the sigma-delta modulator to generate a digital code representative of the analog signal.

公开(公告)号：US09696350B2

公开(公告)日：2017-07-04

申请号：US13907802

申请日：2013-05-31

Applicant: INTEL CORPORATION

Inventor： Edward A. Burton ,  Gerhard Schrom ,  Michael W. Rogers ,  Alexander Lyakhov ,  Ravi Sankar Vunnam ,  Jonathan P. Douglas ,  Fabrice Paillet ,  J. Keith Hodgson ,  William Dawson Kesling ,  Chiu Keung Tang ,  Narayanan Raghuraman ,  Narayanan Natarajan ,  Samie Samaan ,  George Geannopoulos

IPC: H02M3/157 ,  G01R19/00 ,  H03L5/00 ,  H03M1/66 ,  G06T3/40 ,  H02M3/156 ,  H02M1/088 ,  H02M3/158 ,  H03M1/68 ,  H02M1/00

CPC classification number: G01R19/0092 ,  G06T3/40 ,  H02M1/088 ,  H02M3/156 ,  H02M3/157 ,  H02M3/158 ,  H02M2001/0009 ,  H02M2003/1566 ,  H03L5/00 ,  H03M1/66 ,  H03M1/685

Abstract: Described is an apparatus having a non-linear control to manage power supply droop at an output of a voltage regulator. The apparatus comprises: a first inductor for coupling to a load; a capacitor, coupled to the first inductor, and for coupling to the load; a first high-side switch couple to the first inductor; a first low-side switch coupled to the first inductor; a bridge controller to control when to turn on and off the first high-side and first low-side switches; and a non-linear control (NLC) unit to monitor output voltage on the load, and to cause the bridge controller to turn on the first high-side switch and turn off the first low-side switch when a voltage droop is detected on the load.

公开(公告)号：US20160233879A1

公开(公告)日：2016-08-11

申请号：US14705805

申请日：2015-05-06

Applicant: Intel Corporation

Inventor： Takao Oshita ,  George L. Geannopoulos ,  David E. Duarte ,  J. Keith Hodgson ,  James S. Ayers ,  Avner Kornfeld ,  Jonathan P. Douglas

IPC: H03M3/00 ,  H03M1/00 ,  H03M1/12

CPC classification number: H03M3/458 ,  H03M1/00 ,  H03M1/002 ,  H03M1/12 ,  H03M1/123 ,  H03M1/1245 ,  H03M1/804 ,  H03M3/30 ,  H03M3/32 ,  H03M3/34

Abstract: Described is an analog to digital converter (ADC) which comprises: a sigma-delta modulator to receive an analog signal, the sigma-delta modulator operable to perform chopping to cancel common-mode noise; and one or more counters coupled to the sigma-delta modulator to generate a digital code representative of the analog signal.

Abstract translation: 描述了一种模数转换器（ADC），其包括：用于接收模拟信号的Σ-Δ调制器，可用于执行斩波以消除共模噪声的Σ-Δ调制器; 以及耦合到Σ-Δ调制器的一个或多个计数器以产生表示模拟信号的数字代码。

公开(公告)号：US09733282B2

公开(公告)日：2017-08-15

申请号：US14543346

申请日：2014-11-17

Applicant: INTEL CORPORATION

Inventor： Gerhard Schrom ,  J. Keith Hodgson ,  Alexander Lyakhov ,  Chiu Keung Tang ,  Narayanan Raghuraman ,  Narayanan Natarajan

IPC: H03M1/66 ,  G01R19/00 ,  H02M3/157 ,  H03L5/00 ,  G06T3/40 ,  H02M3/156 ,  H02M1/088 ,  H02M3/158 ,  H03M1/68 ,  H02M1/00

CPC classification number: G01R19/0092 ,  G06T3/40 ,  H02M1/088 ,  H02M3/156 ,  H02M3/157 ,  H02M3/158 ,  H02M2001/0009 ,  H02M2003/1566 ,  H03L5/00 ,  H03M1/66 ,  H03M1/685

Abstract: Apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. are provided here. An apparatus is provided which comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.

公开(公告)号：US20170005670A1

公开(公告)日：2017-01-05

申请号：US15265730

申请日：2016-09-14

Applicant: Intel Corporation

Inventor： Takao Oshita ,  George L. Geannopoulos ,  David E. Duarte ,  J. Keith Hodgson ,  James S. Ayers ,  Avner Kornfeld ,  Jonathan P. Douglas

IPC: H03M3/00 ,  H03M1/00 ,  H03M1/12

CPC classification number: H03M3/458 ,  H03M1/00 ,  H03M1/002 ,  H03M1/12 ,  H03M1/123 ,  H03M1/1245 ,  H03M1/804 ,  H03M3/30 ,  H03M3/32 ,  H03M3/34

Abstract: Described is an analog to digital converter (ADC) which comprises: a sigma-delta modulator to receive an analog signal, the sigma-delta modulator operable to perform chopping to cancel common-mode noise; and one or more counters coupled to the sigma-delta modulator to generate a digital code representative of the analog signal.

Abstract translation: 描述了一种模数转换器（ADC），其包括：用于接收模拟信号的Σ-Δ调制器，可用于执行斩波以消除共模噪声的Σ-Δ调制器; 以及耦合到Σ-Δ调制器的一个或多个计数器以产生表示模拟信号的数字代码。