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    Customer-transparent logic redundancy for improved yield
    1.
    发明授权
    Customer-transparent logic redundancy for improved yield 有权

    公开(公告)号：US11293980B2

    公开(公告)日：2022-04-05

    申请号：US17132820

    申请日：2020-12-23

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

    Inventor： Igor Arsovski ,  John R. Goss ,  Eric D. Hunt-Schroeder ,  Andrew K. Killorin

    IPC: G01R31/3177

    Abstract: Systems and methods are provided for implementing customer-transparent logic redundancy in scan chains for improved yield of integrated circuits. More specifically, an integrated circuit structure is provided for that includes a plurality of combined latch structures. Each of the combined latch structures includes an original latch and a redundant latch. The integrated circuit structure further includes a plurality of combined logic structures. Each of the combined logic structures includes an original logic structure a redundant logic structure. Each redundant latch is a duplicate of each respective original latch within a combined latch structure and each redundant logic structure is a duplicate of each respective original logic structure within a combined logic structure such that a two-fold library of latches and logic is provided for one or more scan chains of the integrated circuit structure.

    Customer-transparent logic redundancy for improved yield
    4.
    发明授权
    Customer-transparent logic redundancy for improved yield 有权

    公开(公告)号：US09791507B2

    公开(公告)日：2017-10-17

    申请号：US14995353

    申请日：2016-01-14

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

    Inventor： Igor Arsovski ,  John R. Goss ,  Eric D. Hunt-Schroeder ,  Andrew K. Killorin

    IPC: G06F11/22 ,  G06F17/50 ,  G01R31/3177

    CPC classification number: G01R31/3177

    Abstract: Systems and methods are provided for implementing customer-transparent logic redundancy in scan chains for improved yield of integrated circuits. More specifically, an integrated circuit structure is provided for that includes a plurality of combined latch structures. Each of the combined latch structures includes an original latch and a redundant latch. The integrated circuit structure further includes a plurality of combined logic structures. Each of the combined logic structures includes an original logic structure a redundant logic structure. Each redundant latch is a duplicate of each respective original latch within a combined latch structure and each redundant logic structure is a duplicate of each respective original logic structure within a combined logic structure such that a two-fold library of latches and logic is provided for one or more scan chains of the integrated circuit structure.

    Thermally adaptive in-system allocation
    5.
    发明授权
    Thermally adaptive in-system allocation 有权
    热适应系统内分配

    公开(公告)号：US08963566B2

    公开(公告)日：2015-02-24

    申请号：US13645869

    申请日：2012-10-05

    Applicant: International Business Machines Corporation

    Inventor： John R. Goss ,  Robert McMahon ,  Troy J. Perry

    IPC: G01R31/00

    CPC classification number: H03K19/00392 ,  G01R31/2874 ,  G06F1/206 ,  G06F11/2094 ,  G06F11/24

    Abstract: An integrated circuit device includes component devices (that include primary and alternate devices) and storage elements connected to the component devices. The storage elements store different sets of repair addresses indicating which of the primary devices and alternate devices are to be enabled. Further, a controller is connected to the storage elements, and a temperature sensor is connected to the controller. The temperature sensor senses the temperature. The controller selects one of the different storage elements to select at least one of the sets of repair addresses based on the temperature sensed by the temperature sensor. The sets of repair addresses share use of at least one of the alternate devices and at least one of the primary devices.

    Abstract translation: 集成电路设备包括组件设备（包括主设备和备用设备）以及连接到组件设备的存储元件。 存储元件存储不同的修复地址集，指示哪些主设备和备用设备将被启用。 此外，控制器连接到存储元件，并且温度传感器连接到控制器。 温度传感器检测温度。 控制器根据温度传感器感测到的温度，选择不同的存储元件之一来选择至少一个维修地址组。 这些修复地址共享至少一个替代设备和至少一个主要设备的使用。

    Customer-transparent logic redundancy for improved yield
    7.
    发明授权
    Customer-transparent logic redundancy for improved yield 有权

    公开(公告)号：US10955474B2

    公开(公告)日：2021-03-23

    申请号：US16676776

    申请日：2019-11-07

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

    Inventor： Igor Arsovski ,  John R. Goss ,  Eric D. Hunt-Schroeder ,  Andrew K. Killorin

    IPC: G06F30/3953 ,  G01R31/3177

    Abstract: Systems and methods are provided for implementing customer-transparent logic redundancy in scan chains for improved yield of integrated circuits. More specifically, an integrated circuit structure is provided for that includes a plurality of combined latch structures. Each of the combined latch structures includes an original latch and a redundant latch. The integrated circuit structure further includes a plurality of combined logic structures. Each of the combined logic structures includes an original logic structure a redundant logic structure. Each redundant latch is a duplicate of each respective original latch within a combined latch structure and each redundant logic structure is a duplicate of each respective original logic structure within a combined logic structure such that a two-fold library of latches and logic is provided for one or more scan chains of the integrated circuit structure.

    Customer-transparent logic redundancy for improved yield
    9.
    发明授权
    Customer-transparent logic redundancy for improved yield 有权
    客户透明的逻辑冗余，提高产量

    公开(公告)号：US09274171B1

    公开(公告)日：2016-03-01

    申请号：US14539527

    申请日：2014-11-12

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

    Inventor： Igor Arsovski ,  John R. Goss ,  Eric D. Hunt-Schroeder ,  Andrew K. Killorin

    IPC: G06F11/22 ,  G01R31/3177

    CPC classification number: G01R31/3177

    Abstract: Systems and methods are provided for implementing customer-transparent logic redundancy in scan chains for improved yield of integrated circuits. More specifically, an integrated circuit structure is provided for that includes a plurality of combined latch structures. Each of the combined latch structures includes an original latch and a redundant latch. The integrated circuit structure further includes a plurality of combined logic structures. Each of the combined logic structures includes an original logic structure a redundant logic structure. Each redundant latch is a duplicate of each respective original latch within a combined latch structure and each redundant logic structure is a duplicate of each respective original logic structure within a combined logic structure such that a two fold library of latches and logic is provided for one or more scan chains of the integrated circuit structure.

    Abstract translation: 提供了系统和方法，用于在扫描链中实现客户透明的逻辑冗余，以提高集成电路的产量。 更具体地，提供了包括多个组合的锁存结构的集成电路结构。 组合的锁存结构中的每一个包括原始锁存器和冗余锁存器。 集成电路结构还包括多个组合的逻辑结构。 组合逻辑结构中的每一个包括原始逻辑结构冗余逻辑结构。 每个冗余锁存器是组合锁存结构内的每个相应的原始锁存器的副本，并且每个冗余逻辑结构是组合逻辑结构内每个相应的原始逻辑结构的重复，使得两个锁存器和逻辑库被提供给一个或 更多扫描链的集成电路结构。

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