公开(公告)号：US11029334B2

公开(公告)日：2021-06-08

申请号：US16536620

申请日：2019-08-09

Applicant: International Business Machines Corporation

Inventor： David M. Audette ,  Dennis R. Conti ,  Marc D. Knox ,  Grant W. Wagner

IPC: G01R1/067

Abstract: A probe includes a pedestal and at least one feature extending from the pedestal to engage a surface of a corresponding contact at a position offset from a central longitudinal axis of the contact. The pedestal includes a cavity and the feature can include one or more blades that extend from a periphery of the cavity to a central longitudinal axis of the pedestal. The three blades are configured to engage the surface of the contact. The three blades can be positioned within the cavity to provide a 120-degree rotational symmetry about the central longitudinal axis of the pedestal.

公开(公告)号：US10444260B2

公开(公告)日：2019-10-15

申请号：US15208185

申请日：2016-07-12

Applicant: International Business Machines Corporation

Inventor： David M. Audette ,  Dennis R. Conti ,  Marc D. Knox ,  Grant W. Wagner

IPC: G01R1/067

Abstract: A probe includes a pedestal and at least one feature extending from the pedestal to engage a surface of a corresponding contact at a position offset from a central longitudinal axis of the contact.

公开(公告)号：US09437670B2

公开(公告)日：2016-09-06

申请号：US13689090

申请日：2012-11-29

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Nathaniel R. Chadwick ,  John B. DeForge ,  John J. Ellis-Monaghan ,  Jeffrey P. Gambino ,  Ezra D. Hall ,  Marc D. Knox ,  Kirk D. Peterson

IPC: G01R31/02 ,  H01L29/00 ,  H01L21/66 ,  G01R31/28

CPC classification number: H01L29/00 ,  G01R31/2818 ,  G01R31/2856 ,  H01L22/34 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A test circuit including a light activated test connection in a semiconductor device is provided. The light activated test connection is electrically conductive during a test of the semiconductor device and is electrically non-conductive after the test.

Abstract translation: 提供一种包括半导体器件中的光激活测试连接的测试电路。 在半导体器件的测试期间，光激发测试连接是导电的，并且在测试之后是非导电的。

公开(公告)号：US09269603B2

公开(公告)日：2016-02-23

申请号：US13890776

申请日：2013-05-09

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Luc Guerin ,  Marc D. Knox ,  George J. Lawson ,  Van T. Truong ,  Steve Whitehead

IPC: H01L21/683

CPC classification number: H01L21/6835 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381

Abstract: An assembly including a liquid thermal interface material for surface tension adhesion and thermal control used during electrical/thermal test of a 3D wafer and methods of use. The method includes temporarily attaching a thinned wafer to a carrier wafer by applying a non-adhesive material therebetween and pressing the thinned wafer and the blank silicon-based carrier wafer together.

Abstract translation: 包括用于3D晶片的电/热测试期间使用的用于表面张力粘合和热控制的液体热界面材料的组件和使用方法。 该方法包括通过在其间施加非粘合材料并将薄的晶片和空白的硅基载体晶片压在一起，将薄的晶片临时附接到载体晶片。

公开(公告)号：US20180017592A1

公开(公告)日：2018-01-18

申请号：US15208185

申请日：2016-07-12

Applicant: International Business Machines Corporation

Inventor： David M. Audette ,  Dennis R. Conti ,  Marc D. Knox ,  Grant W. Wagner

IPC: G01R1/067

Abstract: A probe includes a pedestal and at least one feature extending from the pedestal to engage a surface of a corresponding contact at a position offset from a central longitudinal axis of the contact.

公开(公告)号：US20190195913A1

公开(公告)日：2019-06-27

申请号：US16288977

申请日：2019-02-28

Applicant: International Business Machines Corporation

Inventor： David M. Audette ,  Dennis R. Conti ,  Marc D. Knox ,  Grant W. Wagner

IPC: G01R1/073 ,  G01R31/28

CPC classification number: G01R1/07307 ,  G01R1/07321 ,  G01R31/2886

Abstract: A system for testing functionality of die on a wafer including a plurality of contacts includes a support structure and a plurality of probes mounted to the support structure in an array. A configuration of each of the plurality of probes varies based on a position of the probe within the array to maintain uniform engagement between the plurality of probes and a corresponding plurality of contacts across the array.

公开(公告)号：US10261108B2

公开(公告)日：2019-04-16

申请号：US15208212

申请日：2016-07-12

Applicant: International Business Machines Corporation

Inventor： David M. Audette ,  Dennis R. Conti ,  Marc D. Knox ,  Grant W. Wagner

IPC: G01R31/28 ,  G01R1/073

Abstract: A system for testing functionality of die on a wafer including a plurality of contacts includes a support structure and a plurality of probes mounted to the support structure in an array. A configuration of each of the plurality of probes varies based on a position of the probe within the array to maintain uniform engagement between the plurality of probes and a corresponding plurality of contacts across the array.

公开(公告)号：US20180358323A1

公开(公告)日：2018-12-13

申请号：US15850781

申请日：2017-12-21

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： David M. Audette ,  Sukjay Chey ,  Dennis R. Conti ,  Marc D. Knox ,  Sankeerth Rajalingam ,  Cedric Speltz ,  Grant Wagner

IPC: H01L23/00 ,  B23K3/06

CPC classification number: H01L24/742 ,  B23K3/0623 ,  H01L24/11 ,  H01L2224/10

Abstract: A method of pressing solder bumps using a pressing apparatus before testing a wafer, including loading the wafer into the pressing apparatus, where the wafer includes a number of chips, and the wafer is aligned with respect to a test head of the pressing apparatus. The test head includes a substrate which has pressing structures arranged across a surface of the substrate facing the wafer. The pressing structures contact the solder bumps, where the solder bumps include a first surface topology and the pressing structures include a pressing surface topology prior to the contact. The caused contact includes altering a shape of each of the plurality of solder bumps, such that the plurality of solder bumps then a second surface topology after the caused contact, and the second surface topology of the solder bumps matches the pressing surface topology after the caused contact.

公开(公告)号：US20180358322A1

公开(公告)日：2018-12-13

申请号：US15847196

申请日：2017-12-19

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： David M. Audette ,  Sukjay Chey ,  Dennis R. Conti ,  Marc D. Knox ,  Sankeerth Rajalingam ,  Cedric Speltz ,  Grant Wagner

IPC: H01L23/00 ,  B23K3/06

CPC classification number: H01L24/742 ,  B23K3/0623 ,  H01L24/11 ,  H01L2224/10

Abstract: A method of pressing solder bumps using a pressing apparatus before testing a wafer, including loading the wafer into the pressing apparatus, where the wafer includes a number of chips, and the wafer is aligned with respect to a test head of the pressing apparatus. The test head includes a substrate which has pressing structures arranged across a surface of the substrate facing the wafer. The pressing structures contact the solder bumps, where the solder bumps include a first surface topology and the pressing structures include a pressing surface topology prior to the contact. The caused contact includes altering a shape of each of the plurality of solder bumps, such that the plurality of solder bumps then a second surface topology after the caused contact, and the second surface topology of the solder bumps matches the pressing surface topology after the caused contact.

公开(公告)号：US20180017596A1

公开(公告)日：2018-01-18

申请号：US15208212

申请日：2016-07-12

Applicant: International Business Machines Corporation

Inventor： David M. Audette ,  Dennis R. Conti ,  Marc D. Knox ,  Grant W. Wagner

IPC: G01R1/073

CPC classification number: G01R1/07307 ,  G01R1/07321 ,  G01R31/2886

Abstract: A system for testing functionality of die on a wafer including a plurality of contacts includes a support structure and a plurality of probes mounted to the support structure in an array. A configuration of each of the plurality of probes varies based on a position of the probe within the array to maintain uniform engagement between the plurality of probes and a corresponding plurality of contacts across the array.