公开(公告)号：US10896992B2

公开(公告)日：2021-01-19

申请号：US16531649

申请日：2019-08-05

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： John J. Ellis-Monaghan ,  Jeffrey P. Gambino ,  Mark D. Jaffe ,  Kirk D. Peterson

IPC: H01L31/18 ,  H01L31/103 ,  H01L31/028 ,  H01L31/0232 ,  G02B6/12 ,  H01P1/17 ,  H01L31/02 ,  H01P3/16

Abstract: Photodiode structures and methods of manufacture are disclosed. The method includes forming a waveguide structure in a dielectric layer. The method further includes forming a Ge material in proximity to the waveguide structure in a back end of the line (BEOL) metal layer. The method further includes crystallizing the Ge material into a crystalline Ge structure by a low temperature annealing process with a metal layer in contact with the Ge material.

公开(公告)号：US10109639B1

公开(公告)日：2018-10-23

申请号：US15618695

申请日：2017-06-09

Applicant: International Business Machines Corporation

Inventor： John B. DeForge ,  John J. Ellis-Monaghan ,  Terence B. Hook ,  Kirk D. Peterson

IPC: H01L27/115 ,  H01L27/1156 ,  H01L27/11558 ,  H01L27/12

Abstract: A method fabricates a lateral non-volatile storage cell. The lateral non-volatile storage cell includes a first transistor including a first transistor body formed on a dielectric layer. The first transistor includes a source region and drain region on opposite sides of the first transistor body. A second transistor is laterally adjacent to the first transistor and includes a second transistor body, parallel with the first transistor body, formed on the dielectric layer. A first layer of gate oxide of a first thickness is formed over the first transistor body, and a second layer of gate oxide of a second thickness is formed over a portion of the second transistor body. The first thickness and the second thickness are different. A floating gate is formed over the first layer of gate oxide, the second layer of gate oxide, and the dielectric layer.

公开(公告)号：US09690051B2

公开(公告)日：2017-06-27

申请号：US14788179

申请日：2015-06-30

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Yoba Amoah ,  Brennan J. Brown ,  John J. Ellis-Monaghan ,  Ashleigh R. Kreider

IPC: G02B6/34 ,  G02B6/12 ,  G02B6/32 ,  G02B6/26 ,  G02B6/293 ,  G02B6/35

CPC classification number: G02B6/32 ,  G02B6/29304 ,  G02B6/30 ,  G02B6/305 ,  G02B6/34 ,  G02B6/352 ,  G02B6/4206

Abstract: A wafer structure includes a diffractive lens disposed on a backside of a wafer and coupled to a front side waveguide, the diffractive lens being configured to receive light and focus the light to the front side waveguide.

公开(公告)号：US20170123290A1

公开(公告)日：2017-05-04

申请号：US14927621

申请日：2015-10-30

Applicant: International Business Machines Corporation

Inventor： John J. Ellis-Monaghan ,  Jeffrey P. Gambino ,  Mark D. Jaffe ,  Kirk D. Peterson ,  Jed H. Rankin

IPC: G02F1/313 ,  G02F1/025 ,  G02F1/01

CPC classification number: G02F1/3137 ,  G02F1/0147 ,  G02F1/025 ,  G02F2201/58 ,  G02F2203/15

Abstract: Various particular embodiments include an optical structure, including: a photonic microring including an integral signal detector for detecting a level of an optical signal in the photonic microring; and a controller, coupled to the signal detector, for selectively adjusting a resonant frequency of the photonic microring based on the detected level of the optical signal in the photonic microring.

公开(公告)号：US20160377805A1

公开(公告)日：2016-12-29

申请号：US14749806

申请日：2015-06-25

Applicant: International Business Machines Corporation

Inventor： John J. Ellis-Monaghan ,  Brendan S. Harris ,  Vibhor Jain ,  Thomas Kessler ,  Yves T. Ngu ,  Sebastian T. Ventrone

IPC: G02B6/125 ,  B81B7/02 ,  G02B6/28 ,  G02B6/122 ,  G02B6/35

CPC classification number: G02B6/125 ,  B81B7/02 ,  B81B2201/045 ,  G02B6/1225 ,  G02B6/2808 ,  G02B6/3502 ,  G02B6/3562 ,  G02B6/357 ,  G02B6/3596 ,  G02B6/3598 ,  G02B2006/12145 ,  G02B2006/1215

Abstract: Various particular embodiments include a primary waveguide including an end section; cantilevered waveguides, each cantilevered waveguide including an end section disposed adjacent the end section of the primary waveguide; and control pins for applying an electrical bias to the cantilevered waveguides to selectively displace the end sections of the cantilevered waveguides away from the end section of the primary waveguide.

Abstract translation: 各种具体实施例包括：包括端部的主波导; 悬臂波导，每个悬臂式波导包括邻近初级波导的端部设置的端部; 以及控制引脚，用于将电偏压施加到悬臂波导，以选择性地使悬臂波导的端部远离主波导的端部。

公开(公告)号：US09397174B2

公开(公告)日：2016-07-19

申请号：US14516623

申请日：2014-10-17

Applicant: International Business Machines Corporation

Inventor： John J. Ellis-Monaghan ,  Jeffrey P. Gambino ,  Russell T. Herrin ,  Laura J. Schutz ,  Steven M. Shank

IPC: H01L27/092 ,  H01L29/40 ,  H01L21/8238

CPC classification number: H01L29/408 ,  H01L21/8238 ,  H01L21/823842 ,  H01L21/823871 ,  H01L27/092

Abstract: A structure that provides a diffusion barrier between two doped regions. The structure includes a diffusion barrier including a semiconductor layer comprising a first doped region and a second doped region; and a diffusion barrier separating the first doped region and the second doped region, wherein the diffusion barrier comprises a doped portion and a notch above the doped portion.

Abstract translation: 在两个掺杂区域之间提供扩散阻挡层的结构。 该结构包括扩散阻挡层，包括包含第一掺杂区和第二掺杂区的半导体层; 以及分离所述第一掺杂区域和所述第二掺杂区域的扩散阻挡层，其中所述扩散阻挡层包括掺杂部分和所述掺杂部分上方的凹口。

公开(公告)号：US20160172850A1

公开(公告)日：2016-06-16

申请号：US14569005

申请日：2014-12-12

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： John J. Ellis-Monaghan ,  Alain Loiseau

IPC: H02H9/04

CPC classification number: H02H9/046

Abstract: Approaches for a comparative ESD protection scheme are provided. An electrostatic discharge (ESD) clamping circuit includes: a discharge field effect transistor (FET) connected between a power supply node and ground; and a comparator that receives a divided power supply voltage at a first input and a reference voltage at a second input. The comparator outputs a first value that turns the discharge FET on when the divided power supply voltage is greater than the reference voltage. The comparator outputs a second value that turns the discharge FET off when the divided power supply voltage is less than or equal to the reference voltage.

Abstract translation: 提供了一种比较ESD保护方案。 静电放电（ESD）钳位电路包括：连接在电源节点和地之间的放电场效应晶体管（FET）; 以及比较器，其在第一输入处接收分压的电源电压，并在第二输入端接收参考电压。 当分压电源电压大于参考电压时，比较器输出使放电FET导通的第一值。 比较器输出第二值，当分压电源电压小于或等于参考电压时，使第二值关断放电FET。

公开(公告)号：US09310576B1

公开(公告)日：2016-04-12

申请号：US14554678

申请日：2014-11-26

Applicant: International Business Machines Corporation

Inventor： John J. Ellis-Monaghan ,  Brendan S. Harris ,  Vibhor Jain ,  Thomas Kessler ,  Yves T. Ngu ,  Sebastian T. Ventrone

IPC: G02B6/12 ,  G02B6/42 ,  G02B6/43 ,  H01L31/0232

CPC classification number: H01L31/02327 ,  G02B6/4249 ,  G02B6/4274

Abstract: Various embodiments include an integrated circuit having: at least one waveguide disposed in a low refractive index layer; a splitter connected to the at least one waveguide, the splitter consisting of at least two signal paths; an optical signal detector connected to an end of each of the at least two signal paths; and an electrical disconnect member connected to each optical signal detector.

Abstract translation: 各种实施例包括具有：设置在低折射率层中的至少一个波导的集成电路; 连接到所述至少一个波导的分离器，所述分离器由至少两个信号路径组成; 连接到所述至少两个信号路径中的每一个的一端的光信号检测器; 以及连接到每个光信号检测器的电断开构件。

公开(公告)号：US09304335B2

公开(公告)日：2016-04-05

申请号：US14332886

申请日：2014-07-16

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： John J. Ellis-Monaghan ,  William M. Green ,  Michael J. Hauser ,  Edward W. Kiewra ,  Xuefeng Liu ,  Steven M. Shank

IPC: H01L21/782 ,  H01L27/14 ,  H01L29/78 ,  G02F1/025 ,  H01L29/10 ,  H01L29/08 ,  H01L29/423 ,  H01L29/40 ,  H01L29/06 ,  H01L29/49 ,  H01L27/088 ,  H01L21/306 ,  H01L29/66 ,  H01L27/06 ,  G02B6/136 ,  G02B6/12

CPC classification number: G02F1/025 ,  G02B6/136 ,  G02B2006/12061 ,  G02B2006/12142 ,  G02B2006/12176 ,  H01L21/30604 ,  H01L27/0617 ,  H01L27/088 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/0865 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/42356 ,  H01L29/4916 ,  H01L29/66681 ,  H01L29/66689 ,  H01L29/7823 ,  H01L29/7824 ,  H01L29/78624

Abstract: A device includes a laterally diffused metal-oxide-semiconductor (LDMOS) device integrated with an optical modulator. An optical waveguide of the optical modulator includes a silicon-containing structure in a drift region of the LDMOS device.

Abstract translation: 一种器件包括与光学调制器集成的横向扩散的金属氧化物半导体（LDMOS）器件。 光调制器的光波导包括在LDMOS器件的漂移区域中的含硅结构。

公开(公告)号：US09236449B2

公开(公告)日：2016-01-12

申请号：US13939231

申请日：2013-07-11

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： John J. Ellis-Monaghan ,  Theodore J. Letavic ,  Santosh Sharma ,  Yun Shi ,  Michael J. Zierak

IPC: H01L29/808 ,  H01L29/66 ,  H01L29/78 ,  H01L29/10 ,  H01L29/49 ,  H01L29/735

CPC classification number: H01L29/66681 ,  H01L29/1045 ,  H01L29/1058 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/404 ,  H01L29/42368 ,  H01L29/4933 ,  H01L29/4983 ,  H01L29/665 ,  H01L29/66659 ,  H01L29/66893 ,  H01L29/66901 ,  H01L29/735 ,  H01L29/7816 ,  H01L29/7817 ,  H01L29/7818 ,  H01L29/7835

Abstract: A high-voltage LDMOS device with voltage linearizing field plates and methods of manufacture are disclosed. The method includes forming a continuous gate structure over a deep well region and a body of a substrate. The method further includes forming oppositely doped, alternating segments in the continuous gate structure. The method further includes forming a contact in electrical connection with a tip of the continuous gate structure and a drain region formed in the substrate. The method further includes forming metal regions in direct electrical contact with segments of at least one species of the oppositely doped, alternating segments.

Abstract translation: 公开了具有电压线性化场板的高压LDMOS器件和制造方法。 该方法包括在深阱区域和衬底的主体上形成连续的栅极结构。 该方法还包括在连续栅极结构中形成相对掺杂的交替的段。 该方法还包括形成与连续栅极结构的尖端电连接的触点和形成在衬底中的漏极区。 该方法还包括形成与至少一种相反掺杂的交替区段的区段直接电接触的金属区域。