公开(公告)号：US20190305148A1

公开(公告)日：2019-10-03

申请号：US16445513

申请日：2019-06-19

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Solomon Assefa ,  Bruce W. Porth ,  Steven M. Shank

IPC: H01L31/0232 ,  H01L31/18 ,  G02B6/136 ,  H01L31/028 ,  H01L31/20 ,  G02B6/42 ,  H01L31/0203 ,  G02B6/13 ,  H01L31/0352 ,  G06F17/50 ,  H01L29/06 ,  H01L31/0304 ,  H01L31/09 ,  G02B6/122 ,  G02B6/12

Abstract: An encapsulated integrated photodetector waveguide structures with alignment tolerance and methods of manufacture are disclosed. The method includes forming a waveguide structure bounded by one or more shallow trench isolation (STI) structure(s). The method further includes forming a photodetector fully landed on the waveguide structure.

公开(公告)号：US10170661B2

公开(公告)日：2019-01-01

申请号：US15406125

申请日：2017-01-13

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Solomon Assefa ,  Bruce W. Porth ,  Steven M. Shank

IPC: H01L31/18 ,  H01L31/20 ,  H01L31/0232 ,  H01L31/028 ,  G02B6/122 ,  G02B6/136 ,  G02B6/42 ,  H01L31/0203 ,  H01L31/09 ,  G06F17/50 ,  H01L29/06 ,  H01L31/0304 ,  G02B6/12 ,  H01L31/0352 ,  G02B6/13

Abstract: An encapsulated integrated photodetector waveguide structures with alignment tolerance and methods of manufacture are disclosed. The method includes forming a waveguide structure bounded by one or more shallow trench isolation (STI) structure(s). The method further includes forming a photodetector fully landed on the waveguide structure.

公开(公告)号：US20180331249A1

公开(公告)日：2018-11-15

申请号：US16033649

申请日：2018-07-12

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Solomon Assefa ,  Bruce W. Porth ,  Steven M. Shank

IPC: H01L31/20 ,  H01L31/18 ,  G02B6/12 ,  G02B6/122 ,  G02B6/13 ,  H01L31/09 ,  H01L31/0352 ,  H01L31/0304 ,  H01L31/028 ,  H01L31/0232 ,  H01L31/0203 ,  H01L29/06 ,  G06F17/50 ,  G02B6/42 ,  G02B6/136

Abstract: An encapsulated integrated photodetector waveguide structures with alignment tolerance and methods of manufacture are disclosed. The method includes forming a waveguide structure bounded by one or more shallow trench isolation (STI) structure(s). The method further includes forming a photodetector fully landed on the waveguide structure.

公开(公告)号：US10026852B2

公开(公告)日：2018-07-17

申请号：US15463189

申请日：2017-03-20

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Solomon Assefa ,  Tymon Barwicz ,  William M. Green ,  Marwan H. Khater ,  Jessie C. Rosenberg ,  Steven M. Shank

IPC: H01L21/02 ,  H01L31/0203 ,  H01L31/0232 ,  H01L31/18 ,  H01L31/02 ,  H01L31/153 ,  G02B6/42

Abstract: Approaches for silicon photonics integration are provided. A method includes: forming at least one encapsulating layer over and around a photodetector; thermally crystallizing the photodetector material after the forming the at least one encapsulating layer; and after the thermally crystallizing the photodetector material, forming a conformal sealing layer on the at least one encapsulating layer and over at least one device. The conformal sealing layer is configured to seal a crack in the at least one encapsulating layer. The photodetector and the at least one device are on a same substrate. The at least one device includes a complementary metal oxide semiconductor device or a passive photonics device.

公开(公告)号：US20180090432A1

公开(公告)日：2018-03-29

申请号：US15824906

申请日：2017-11-28

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Jeffrey P. Gambino ,  Mark D. Jaffe ,  Steven M. Shank ,  Anthony K. Stamper

IPC: H01L23/528 ,  H01L21/762 ,  H01L29/06 ,  H01L27/12 ,  H01L21/768 ,  H01L21/683 ,  H01L23/522 ,  H01L23/485

CPC classification number: H01L23/528 ,  H01L21/6835 ,  H01L21/76224 ,  H01L21/76251 ,  H01L21/76895 ,  H01L21/76897 ,  H01L21/76898 ,  H01L23/485 ,  H01L23/5226 ,  H01L27/1203 ,  H01L29/0649 ,  H01L2221/68327 ,  H01L2221/68372

Abstract: A back-side device structure with a silicon-on-insulator substrate that includes: a first dielectric layer that includes a first via that communicates with a trench, a contact plug that fills the trench, and a first contact formed in a second dielectric layer. The first contact fills the first via and connects with the contact plug and a wire formed in a third dielectric layer. A final substrate is connected to a buried insulator layer of the silicon-on-insulator substrate such that the contact plug contacts metallization of the final substrate.

公开(公告)号：US20180068891A1

公开(公告)日：2018-03-08

申请号：US15799862

申请日：2017-10-31

Applicant: International Business Machines Corporation

Inventor： Jeffrey P. Gambino ,  Mark D. Jaffe ,  Steven M. Shank ,  Anthony K. Stamper

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/74 ,  H01L21/762 ,  H01L29/10 ,  H01L29/06 ,  H01L27/12 ,  H01L21/683 ,  H01L23/482

CPC classification number: H01L21/76895 ,  H01L21/6835 ,  H01L21/743 ,  H01L21/76251 ,  H01L21/76898 ,  H01L23/4825 ,  H01L23/4827 ,  H01L23/53271 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/1087 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68368

Abstract: A method for fabricating a backside contact using a silicon-on-insulator substrate that includes a device layer, a buried insulator layer, and a handle wafer. The method includes forming a first switch and a second switch in the device layer. An electrically-conducting connection is formed in a trench. The handle wafer is removed. After the handle wafer is removed, the buried insulator layer is partially removed to expose the electrically-conducting connection. After the buried insulator layer is partially removed, a final substrate is connected to the buried insulator layer such that the electrically-conducting connection contacts the final substrate.

公开(公告)号：US09852944B2

公开(公告)日：2017-12-26

申请号：US15274406

申请日：2016-09-23

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Jeffrey P. Gambino ,  Mark D. Jaffe ,  Steven M. Shank ,  Anthony K. Stamper

IPC: H01L21/30 ,  H01L21/768 ,  H01L23/482 ,  H01L21/762 ,  H01L23/532 ,  H01L27/12 ,  H01L29/06 ,  H01L29/10 ,  H01L21/683 ,  H01L21/74

CPC classification number: H01L21/76895 ,  H01L21/6835 ,  H01L21/743 ,  H01L21/76251 ,  H01L21/76898 ,  H01L23/4825 ,  H01L23/4827 ,  H01L23/53271 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/1087 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68368

Abstract: Device structures and fabrication methods for a backside contact to a final substrate. An electrically-conducting connection is formed that extends through a device layer of a silicon-on-insulator substrate and partially through a buried insulator layer of the silicon-on-insulator substrate. After the electrically-conducting connection is formed, a handle wafer of the silicon-on-insulator substrate is removed. After the handle wafer is removed, the buried insulator layer is partially removed to expose the electrically-conducting connection. After the buried insulator layer is partially removed, a final substrate is coupled to the buried insulator layer such that the electrically-conducting connection is coupled with the final substrate.

公开(公告)号：US09691812B2

公开(公告)日：2017-06-27

申请号：US14699015

申请日：2015-04-29

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： John J. Ellis-Monaghan ,  John C. S. Hall ,  Marwan H. Khater ,  Edward W. Kiewra ,  Steven M. Shank

IPC: H01L31/062 ,  H01L31/113 ,  H01L27/146

CPC classification number: H01L31/202 ,  H01L21/02667 ,  H01L27/14643 ,  H01L27/14685 ,  H01L27/14687 ,  H01L27/14689 ,  H01L27/14692 ,  H01L27/14694 ,  H01L27/14698 ,  H01L31/0203 ,  H01L31/028 ,  H01L31/208

Abstract: Photodetector structures and methods of manufacture are provided. The method includes forming undercuts about detector material formed on a substrate. The method further includes encapsulating the detector to form airgaps from the undercuts. The method further includes annealing the detector material causing expansion of the detector material into the airgaps.

公开(公告)号：US20160372416A1

公开(公告)日：2016-12-22

申请号：US15234913

申请日：2016-08-11

Applicant: International Business Machines Corporation

Inventor： Jeffrey P. Gambino ,  Mark D. Jaffe ,  Steven M. Shank ,  Anthony K. Stamper

IPC: H01L23/528 ,  H01L21/768 ,  H01L29/06 ,  H01L21/762 ,  H01L23/522 ,  H01L27/12

CPC classification number: H01L23/528 ,  H01L21/6835 ,  H01L21/76224 ,  H01L21/76251 ,  H01L21/76895 ,  H01L21/76897 ,  H01L21/76898 ,  H01L23/485 ,  H01L23/5226 ,  H01L27/1203 ,  H01L29/0649 ,  H01L2221/68327 ,  H01L2221/68372

Abstract: A back-side device structure with a silicon-on-insulator substrate that includes a device layer, a buried insulator layer, a trench that extends through the device layer and that partially extends through the buried insulator layer, at least one dielectric layer that is formed on the device layer and includes a first opening that communicates with the trench and a contact plug that fills the trench. A final substrate is connected to the buried insulator layer such that the contact plug contacts metallization of the final substrate. The contact plug is externally connected with a source to provide signals to the back-side device structure through a wire formed in the at least one dielectric layer.

Abstract translation: 一种具有绝缘体上硅衬底的背面器件结构，其包括器件层，掩埋绝缘体层，延伸穿过器件层并且部分延伸穿过掩埋绝缘体层的沟槽，至少一个电介质层是 形成在器件层上并且包括与沟槽连通的第一开口和填充沟槽的接触塞。 最终的衬底连接到埋入的绝缘体层，使得接触插塞接触最终衬底的金属化。 接触插头与源外部连接，以通过形成在至少一个电介质层中的导线向后侧器件结构提供信号。

公开(公告)号：US09514987B1

公开(公告)日：2016-12-06

申请号：US14744681

申请日：2015-06-19

Applicant: International Business Machines Corporation

Inventor： Jeffrey P. Gambino ,  Mark D. Jaffe ,  Steven M. Shank ,  Anthony K. Stamper

IPC: H01L23/48 ,  H01L21/768 ,  H01L23/482

CPC classification number: H01L21/76895 ,  H01L21/6835 ,  H01L21/743 ,  H01L21/76251 ,  H01L21/76898 ,  H01L23/4825 ,  H01L23/4827 ,  H01L23/53271 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/1087 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68368

Abstract: Device structures and fabrication methods for a backside contact to a final substrate An electrically-conducting connection is formed that extends through a device layer of a silicon-on-insulator substrate and partially through a buried insulator layer of the silicon-on-insulator substrate. After the electrically-conducting connection is formed, a handle wafer of the silicon-on-insulator substrate is removed. After the handle wafer is removed, the buried insulator layer is partially removed to expose the electrically-conducting connection. After the buried insulator layer is partially removed, a final substrate is coupled to the buried insulator layer such that the electrically-conducting connection is coupled with the final substrate.

Abstract translation: 用于与最终衬底的背面接触的器件结构和制造方法形成延伸穿过绝缘体上硅衬底的器件层并且部分地穿过绝缘体上硅衬底的掩埋绝缘体层的导电连接。 在形成导电连接之后，去除绝缘体上硅衬底的处理晶片。 在移除手柄晶片之后，部分去除掩埋绝缘体层以露出导电连接。 在埋入绝缘体层被部分去除之后，最后的衬底被耦合到埋入绝缘体层，使得导电连接与最终衬底耦合。