公开(公告)号：US20150262910A1

公开(公告)日：2015-09-17

申请号：US14206756

申请日：2014-03-12

Applicant: Invensas Corporation

Inventor： Zhuowen SUN ,  Cyprian Emeka UZOH ,  Yong CHEN

IPC: H01L23/48 ,  H01L23/532

CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L23/3675 ,  H01L23/481 ,  H01L23/53238 ,  H01L23/53295 ,  H01L23/5384 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/02372 ,  H01L2224/11 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/00

Abstract: An apparatus relating generally to a substrate is disclosed. In such an apparatus, the substrate has a first surface and a second surface opposite the first surface. The first surface and the second surface define a thickness of the substrate. A via structure extends from the first surface of the substrate to the second surface of the substrate. The via structure has a first terminal at or proximate to the first surface and a second terminal at or proximate to the second surface provided by a conductive member of the via structure extending from the first terminal to the second terminal. A barrier layer of the via structure is disposed between at least a portion of the conductive member and the substrate. The barrier layer has a conductivity configured to offset a capacitance between the conductive member and the substrate when a signal is passed through the conductive member of the via structure.

Abstract translation: 公开了一般涉及基板的装置。 在这种装置中，衬底具有与第一表面相对的第一表面和第二表面。 第一表面和第二表面限定基底的厚度。 通孔结构从衬底的第一表面延伸到衬底的第二表面。 通孔结构具有位于第一表面处或靠近第一表面的第一端子和位于第二表面处或靠近第二表面处的第二端子，该第二端子由从第一端子延伸到第二端子的通孔结构的导电构件提供。 通孔结构的阻挡层设置在导电部件的至少一部分和基板之间。 阻挡层具有被配置为当信号通过通孔结构的导电构件时抵消导电构件和衬底之间的电容的导电性。

公开(公告)号：US20160267954A1

公开(公告)日：2016-09-15

申请号：US14645811

申请日：2015-03-12

Applicant: INVENSAS CORPORATION

Inventor： Zhuowen SUN ,  Yong CHEN

IPC: G11C8/06 ,  G11C8/12 ,  G11C8/10 ,  G11C5/02 ,  G11C5/06

CPC classification number: G06F13/1673 ,  G06F12/00 ,  G06F12/0623 ,  G06F13/1694 ,  G11C5/04 ,  G11C5/06 ,  G11C8/06 ,  G11C8/12 ,  H01L2224/4824 ,  H01L2924/15311

Abstract: An apparatus relates generally to a reduced load memory module. In such an apparatus, there is a circuit platform with a plurality of memory chips coupled to the circuit platform. Each memory chip of the plurality of memory chips each has a plurality of memory dies. At least one controller is coupled to the circuit platform and further coupled to the plurality of memory chips for communication with the plurality of memory dies thereof. The at least one controller is for receiving chip select signals to provide a plurality of rank select signals in excess of the chip select signals. The plurality of memory dies are coupled with wire bonds within the plurality of memory chips for a reduced load for coupling the circuit platform for communicating via a memory channel. The load is sufficiently reduced for having at least two instances of the memory module share the memory channel.

Abstract translation: 装置一般涉及减载装载存储器模块。 在这种装置中，存在具有耦合到电路平台的多个存储器芯片的电路平台。 多个存储器芯片中的每个存储器芯片各自具有多个存储器管芯。 至少一个控制器耦合到电路平台，并且还耦合到多个存储器芯片，以与其多个存储器模具进行通信。 所述至少一个控制器用于接收芯片选择信号以提供超过芯片选择信号的多个等级选择信号。 多个存储器管芯与多个存储器芯片内的引线接合耦合，用于减少负载，用于耦合电路平台以经由存储器通道进行通信。 为了使存储器模块的至少两个实例共享存储器通道，负载被充分降低。