Substrate structure, semiconductor device fabricated from the same, and method of fabricating the semiconductor device
    4.
    发明授权
    Substrate structure, semiconductor device fabricated from the same, and method of fabricating the semiconductor device 有权
    基板结构,由其制造的半导体器件以及半导体器件的制造方法

    公开(公告)号:US08921890B2

    公开(公告)日:2014-12-30

    申请号:US13551217

    申请日:2012-07-17

    IPC分类号: H01L31/102

    摘要: According to example embodiments, a substrate structure may include a GaN-based third material layer, a GaN-based second material layer, a GaN-based first material layer, and a buffer layer on a non-GaN-based substrate. The GaN-based first material layer may be doped with a first conductive type impurity. The GaN-based second material layer may be doped with a second conductive type impurity at a density that is less than a density of the first conductive type impurity in the first GaN-based material layer. The GaN-based third material layer may be doped with a first conductive type impurity at a density that is less than the density of the first conductive type impurity of the GaN-based first material layer. After a second substrate is attached onto the substrate structure, the non-GaN-based substrate may be removed and a GaN-based vertical type semiconductor device may be fabricated on the second substrate.

    摘要翻译: 根据示例实施例,衬底结构可以包括GaN基第三材料层,GaN基第二材料层,GaN基第一材料层和非GaN基衬底上的缓冲层。 GaN基第一材料层可以掺杂有第一导电类型的杂质。 GaN基第二材料层可以以小于第一GaN基材料层中的第一导电类型杂质的密度的密度掺杂第二导电型杂质。 GaN基第三材料层可以以比GaN基第一材料层的第一导电类型杂质的密度小的密度掺杂第一导电型杂质。 在将第二衬底附着到衬底结构上之后,可以去除非GaN基衬底,并且可以在第二衬底上制造GaN基垂直型半导体器件。

    POWER ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME
    10.
    发明申请
    POWER ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    电力电子设备及其制造方法

    公开(公告)号:US20120037958A1

    公开(公告)日:2012-02-16

    申请号:US13208671

    申请日:2011-08-12

    IPC分类号: H01L29/778 H01L21/335

    摘要: According to an example embodiment, a power electronic device includes a first semiconductor layer, a second semiconductor layer on a first surface of the first semiconductor layer, and a source, a drain, and a gate on the second semiconductor layer. The source, drain and gate are separate from one another. The power electronic device further includes a 2-dimensional electron gas (2DEG) region at an interface between the first semiconductor layer and the second semiconductor layer, a first insulating layer on the gate and a second insulating layer adjacent to the first insulating layer. The first insulating layer has a first dielectric constant and the second insulating layer has a second dielectric constant less than the first dielectric constant.

    摘要翻译: 根据示例性实施例,功率电子器件包括第一半导体层,第一半导体层的第一表面上的第二半导体层以及第二半导体层上的源极,漏极和栅极。 源极,漏极和栅极彼此分开。 电力电子设备还包括在第一半导体层和第二半导体层之间的界面处的二维电子气体(2DEG)区域,栅极上的第一绝缘层和与第一绝缘层相邻的第二绝缘层。 第一绝缘层具有第一介电常数,第二绝缘层具有小于第一介电常数的第二介电常数。