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    FLEXIBLE ELECTRONIC DEVICE
    1.
    发明公开
    FLEXIBLE ELECTRONIC DEVICE 审中-公开

    公开(公告)号：US20240341653A1

    公开(公告)日：2024-10-17

    申请号：US18420789

    申请日：2024-01-24

    Applicant: Industrial Technology Research Institute

    Inventor： Min-Hsiung Liang ,  Chien-Hsun Chu ,  Kuan-Chu Wu ,  Wan-Chen Yang ,  Jui-Chang Chuang ,  Chen-Tsai Yang ,  Heng-Yin Chen ,  Hung-Hsien Ko

    IPC: A61B5/263

    CPC classification number: A61B5/263 ,  A61B2562/164 ,  A61B2562/18

    Abstract: A flexible electronic device includes a first encapsulation layer and a sensing structure. The sensing structure is disposed on the first encapsulation layer and includes a substrate, a plurality of first sensing layer, a plurality of second sensing layer, a first groove and a second groove. The substrate includes a main body, a plurality of first branches and a plurality of second branches. The main body has a first side and a second side opposite to each other. The first branches connect the first side. The second branches connect the second side. The first sensing layers are disposed on the first branches. The second sensing layers are disposed on the second branches. The first groove is disposed between the first branches. The second groove is disposed between the second branches.

    CHIP PACKAGE STRUCTURE
    5.
    发明申请
    CHIP PACKAGE STRUCTURE 审中-公开

    公开(公告)号：US20190057948A1

    公开(公告)日：2019-02-21

    申请号：US15911183

    申请日：2018-03-05

    Applicant: Industrial Technology Research Institute ,  Intellectual Property Innovation Corporation

    Inventor： Chen-Tsai Yang ,  Ko-Chin Yang ,  Jui-Chang Chuang ,  Yen-Ting Wu ,  Chia-Hua Lu

    IPC: H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H01L23/538 ,  H01L25/065

    Abstract: A chip package structure includes a chip package layer and at least one conductive structure layer. The chip package layer includes at least one chip and an encapsulant. The chip has an upper surface, and the encapsulant is used to encapsulate the chip and expose the upper surface. The conductive structure layer includes a plurality of first conductive pillars and a plurality of second conductive pillars. The first conductive pillars are disposed on the upper surface, the second conductive pillars are disposed on the upper surface and located between an edge of the upper surface and the first conductive pillars. A density of the second conductive pillars along an extending direction of the edge is greater than or equal to 1.2 times of a density of the first conductive pillars along the extending direction of the edge.

    ELECTRONIC DEVICE PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
    9.
    发明申请
    ELECTRONIC DEVICE PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF 审中-公开

    公开(公告)号：US20200211984A1

    公开(公告)日：2020-07-02

    申请号：US16404765

    申请日：2019-05-07

    Applicant: Industrial Technology Research Institute

    Inventor： Jui-Chang Chuang ,  Chen-Tsai Yang ,  Wei-Yuan Cheng

    IPC: H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56

    Abstract: An electronic device package structure and a manufacturing method thereof are provided. The electronic device package structure includes a first electronic device layer, a second electronic device layer, and a filling layer disposed between the first electronic device layer and the second electronic device layer, wherein the Young's modulus of the second electronic device layer is less than or equal to the Young's modulus of the first electronic device layer, and the Young's modulus of the filling layer is less than the Young's modulus of the second electronic device layer, and the ratio of the Young's modulus of the first electronic device layer to the Young's modulus of the filling layer is 10 to 1900 and the ratio of the Young's modulus of the second electronic device layer to the Young's modulus of the filling layer is 7.6 to 1300.

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