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    RC IGBT and Method of Producing an RC IGBT
    1.
    发明申请
    RC IGBT and Method of Producing an RC IGBT 有权

    公开(公告)号：US20220392892A1

    公开(公告)日：2022-12-08

    申请号：US17831597

    申请日：2022-06-03

    Applicant: Infineon Technologies AG

    Inventor： Frank Dieter Pfirsch

    IPC: H01L27/06 ,  H01L29/861 ,  H01L29/739 ,  H01L29/66

    Abstract: An RC IGBT includes: an active region with separate IGBT and diode sections; a semiconductor body forming a part of the active region; a first load terminal and control terminal at a first side of the body and a second load terminal at a second side, the control terminal including a control terminal finger that laterally overlaps, in the active region, with the diode section. Control trenches extending into the semiconductor body along a vertical direction have a control trench electrode electrically connected to the control terminal for controlling a load current between the load terminals in the IGBT section. At least one control trench extends into both IGBT and diode sections. The electrical connection between the control trench electrode of that control trench and the control terminal is established at least based on an electrically conductive member arranged, in the diode section, in contact with the control terminal finger.

    Insulated gate bipolar transistor
    5.
    发明授权
    Insulated gate bipolar transistor 有权
    绝缘栅双极晶体管

    公开(公告)号：US09490354B2

    公开(公告)日：2016-11-08

    申请号：US14260490

    申请日：2014-04-24

    Applicant: Infineon Technologies AG

    Inventor： Holger Huesken ,  Frank Dieter Pfirsch ,  Hans-Joachim Schulze

    IPC: H01L29/739 ,  H01L29/36 ,  H01L29/78 ,  H01L21/265 ,  H01L21/22 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/66 ,  H01L29/10 ,  H01L29/167 ,  H01L21/331

    CPC classification number: H01L29/7397 ,  H01L21/22 ,  H01L21/26513 ,  H01L29/0623 ,  H01L29/0834 ,  H01L29/1095 ,  H01L29/167 ,  H01L29/36 ,  H01L29/4236 ,  H01L29/66348

    Abstract: A semiconductor body of an IGBT includes: a first base region of a second conductivity type; a source region of a first conductivity type different from the second conductivity type and forming a first pn-junction with the first base region; a drift region of the first conductivity type and forming a second pn-junction with the first base region; a collector region of the second conductivity type; at least one trench filled with a gate electrode and having a first trench portion of a first width and a second trench portion of a second width, the second width being different from the first width; and a field stop region having the first conductivity type and located between the drift region and the collector region. The field stop region includes a plurality of buried regions having the second conductivity type.

    Abstract translation: IGBT的半导体主体包括：第二导电类型的第一基极区域; 与第二导电类型不同的第一导电类型的源极区域，并与第一基极区域形成第一pn结; 第一导电类型的漂移区，并与第一基区形成第二pn结; 第二导电类型的集电极区域; 至少一个沟槽，其填充有栅电极并且具有第一宽度的第一沟槽部分和第二宽度的第二沟槽部分，所述第二宽度不同于所述第一宽度; 以及具有第一导电类型并位于漂移区域和集电极区域之间的场阻挡区域。 场停止区域包括具有第二导电类型的多个掩埋区域。

    Semiconductor Device with Sensor Potential in the Active Region
    6.
    发明申请
    Semiconductor Device with Sensor Potential in the Active Region 审中-公开
    在有源区域具有传感器电位的半导体器件

    公开(公告)号：US20160099188A1

    公开(公告)日：2016-04-07

    申请号：US14861569

    申请日：2015-09-22

    Applicant: Infineon Technologies AG

    Inventor： Christian Jaeger ,  Johannes Georg Laven ,  Frank Dieter Pfirsch ,  Alexander Philippou

    IPC: H01L21/66 ,  H01L29/423 ,  H01L29/78 ,  H01L29/06

    CPC classification number: H01L22/32 ,  H01L29/0653 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/7395 ,  H01L29/7813 ,  H01L29/7815 ,  H01L29/7827

    Abstract: A semiconductor device includes semiconductor body region and a surface region, the semiconductor body region including a first conductivity type first semiconductor region type and a second conductivity type second semiconductor region. The semiconductor device further includes: a first load contact structure included in the surface region and arranged for feeding a load current into the semiconductor body region; a first trench extending into the semiconductor body region and having a sensor electrode and a first dielectric, the first dielectric electrically insulating the sensor electrode from the second semiconductor region; an electrically conductive path electrically connecting the sensor electrode to the first semiconductor region; a first semiconductor path, wherein the first semiconductor region is electrically coupled to the first load contact structure by at least the first semiconductor path; a sensor contact structure included in the surface region and arranged for receiving an electrical potential of the sensor electrode.

    Abstract translation: 半导体器件包括半导体本体区域和表面区域，该半导体本体区域包括第一导电型第一半导体区域型和第二导电型第二半导体区域。 所述半导体器件还包括：第一负载接触结构，包括在所述表面区域中并被布置成用于将负载电流馈送到所述半导体本体区域中; 延伸到半导体主体区域并具有传感器电极和第一电介质的第一沟槽，所述第一电介质将所述传感器电极与所述第二半导体区域电绝缘; 将传感器电极电连接到第一半导体区域的导电路径; 第一半导体路径，其中所述第一半导体区域通过至少所述第一半导体路径电耦合到所述第一负载接触结构; 传感器接触结构，包括在所述表面区域中并被布置成用于接收所述传感器电极的电位。

    Power Semiconductor Device and Method of Producing a Power Semiconductor Device
    7.
    发明申请
    Power Semiconductor Device and Method of Producing a Power Semiconductor Device 有权

    公开(公告)号：US20230010004A1

    公开(公告)日：2023-01-12

    申请号：US17859453

    申请日：2022-07-07

    Applicant: Infineon Technologies AG

    Inventor： Frank Dieter Pfirsch ,  Thomas Kuenzig

    IPC: H01L29/40

    Abstract: A power semiconductor device includes an active region and an edge termination region surrounding the active region. A field plate structure arranged around the active region includes at least one electrically conductive track electrically connected to a first potential of a first load terminal at a first joint and, at a second joint, electrically connected to a second potential of a second load terminal. The track forms at least n crossings, wherein n is greater 5, with a straight virtual line that extends from the active region towards an edge of the edge termination region. The difference in potential between adjacent two crossings increases in at least 50% of the length of the virtual line, and/or the difference in potential within, with respect to the active region, the first 20% of the length of virtual line is less than 10% of the total difference in potential along the virtual line.

    SEMICONDUCTOR DEVICE HAVING CONTACT LAYERS AND MANUFACTURING METHOD
    8.
    发明申请
    SEMICONDUCTOR DEVICE HAVING CONTACT LAYERS AND MANUFACTURING METHOD 有权

    公开(公告)号：US20210202304A1

    公开(公告)日：2021-07-01

    申请号：US17184725

    申请日：2021-02-25

    Applicant: Infineon Technologies AG

    Inventor： Holger Huesken ,  Frank Dieter Pfirsch

    IPC: H01L21/768 ,  H01L23/532

    Abstract: An embodiment relates to a method for manufacturing a semiconductor device. The method includes providing a semiconductor body including a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type interposed between the first semiconductor region and a first surface of the semiconductor body. The method further includes forming a first contact layer over the first surface of the semiconductor body. The first contact layer forms a direct electrical contact to the second semiconductor region. The method further includes forming a contact trench extending into the semiconductor body by removing at least a portion of the second semiconductor region. The method further includes forming a second contact layer in the contact trench. The second contact layer is directly electrically connected to the semiconductor body at a bottom side of the contact trench.

    Semiconductor device including first and second contact layers and manufacturing method
    10.
    发明授权
    Semiconductor device including first and second contact layers and manufacturing method 有权

    公开(公告)号：US10950494B2

    公开(公告)日：2021-03-16

    申请号：US16251729

    申请日：2019-01-18

    Applicant: Infineon Technologies AG

    Inventor： Holger Huesken ,  Frank Dieter Pfirsch

    IPC: H01L21/768 ,  H01L23/532

    Abstract: An embodiment relates to a method for manufacturing a semiconductor device. The method includes providing a semiconductor body including a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type interposed between the first semiconductor region and a first surface of the semiconductor body. The method further includes forming a first contact layer over the first surface of the semiconductor body. The first contact layer forms a direct electrical contact to the second semiconductor region. The method further includes forming a contact trench extending into the semiconductor body by removing at least a portion of the second semiconductor region. The method further includes forming a second contact layer in the contact trench. The second contact layer is directly electrically connected to the semiconductor body at a bottom side of the contact trench.

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