公开(公告)号：US20040217408A1

公开(公告)日：2004-11-04

申请号：US10768971

申请日：2004-01-30

Applicant: Infineon Technologies AG

Inventor： Franz Hofmann ,  Johannes Kretz ,  Wolfgang Roesner ,  Thomas Schulz

IPC: H01L027/108

CPC classification number: H01L29/785 ,  H01L29/66795

Abstract: A fin field effect transistor having a substrate, a fin structure above the substrate, as well as a drain region and a source region outside the fin structure above the substrate. The fin structure serves as a channel between the source region and the drain region. The source and drain regions are formed once the gate has been produced.

Abstract translation: 具有衬底的翅片场效应晶体管，衬底上方的鳍结构，以及衬底上方的鳍状结构之外的漏极区域和源极区域。 鳍结构用作源极区域和漏极区域之间的沟道。 一旦栅极生产就形成源区和漏区。

公开(公告)号：US20040252576A1

公开(公告)日：2004-12-16

申请号：US10805670

申请日：2004-03-19

Applicant: Infineon Technologies AG

Inventor： Franz Hofmann ,  Richard Johannes Luyken ,  Michael Specht

IPC: G11C008/02

CPC classification number: H01L27/11517 ,  H01L27/115

Abstract: Method for fabricating a semiconductor memory element arrangement. A layer system, including a floating gate and a tunnel barrier arrangement formed on the floating gate, is formed on an electrically insulating layer. A first trench structure is formed in the layer system, and the first trench structure has first parallel trenches extending as far as the insulating layer. A second trench structure is formed in the layer system, and has second parallel trenches arranged perpendicular to the first trenches and extending as far as the insulating layer. First and second gate electrodes are formed in the first and second trench structures. The first gate electrode is adjacent to the floating gate through which first gate electrode electrical charge can be fed or can be dissipated from. The second gate electrode is adjacent to the tunnel barrier arrangement, and can control an electrical charge transmission of the tunnel barrier arrangement.

Abstract translation: 半导体存储元件布置的制造方法。 在电绝缘层上形成包括形成在浮动栅极上的浮动栅极和隧道势垒装置的层系统。 在层系统中形成第一沟槽结构，并且第一沟槽结构具有延伸至绝缘层的第一平行沟槽。 在层系统中形成第二沟槽结构，并且具有垂直于第一沟槽布置并延伸至绝缘层的第二平行沟槽。 第一和第二栅电极形成在第一和第二沟槽结构中。 第一栅电极与浮置栅极相邻，第一栅电极电荷可以通过该栅极馈送或可从其中消散。 第二栅电极与隧道势垒装置相邻，并且可以控制隧道势垒装置的电荷传输。

公开(公告)号：US20040266088A1

公开(公告)日：2004-12-30

申请号：US10839800

申请日：2004-05-06

Applicant: Infineon Technologies AG

Inventor： Richard J. Luyken ,  Franz Hofmann ,  Lothar Risch ,  Dirk Manger ,  Wolfgang Rosner ,  Till Schlosser ,  Michael Specht

IPC: H01L021/8238

CPC classification number: H01L27/10823 ,  H01L27/10808 ,  H01L27/10826 ,  H01L27/10829 ,  H01L27/10891 ,  H01L29/7851

Abstract: A DRAM memory cell is provided with a selection transistor, which is arranged horizontally at a semiconductor substrate surface and has a first source/drain electrode, a second source/drain electrode, a channel layer arranged between the first and the second source/drain electrode in the semiconductor substrate, and a gate electrode, which is arranged along the channel layer and is electrically insulated from the channel layer, a storage capacitor, which has a first capacitor electrode and a second capacitor electrode, insulated from the first capacitor electrode, one of the capacitor electrodes of the storage capacitor being electrically conductively connected to one of the source/drain electrodes of the selection transistor, and a semiconductor substrate electrode on the rear side, the gate electrode enclosing the channel layer at at least two opposite sides.

公开(公告)号：US20040119141A1

公开(公告)日：2004-06-24

申请号：US10701113

申请日：2003-11-03

Applicant: Infineon Technologies AG

Inventor： Dipl.-Ing Matthias Schreiter ,  Reinhard Gabl ,  Martin Jenkner ,  Dipl.-Ing. Bjorn Eversmann ,  Franz Hofmann

IPC: H01L029/00 ,  H01L031/062

CPC classification number: G01N33/4833 ,  G01N27/414 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present invention relates to a biochip for capacitive stimulation and/or detection of biological tissue. The biochip includes a support structure, at least one stimulation and/or sensor device, which is arranged in or on the support structure, and at least one dielectric layer, one layer surface of which is arranged on the stimulation and/or sensor device and the opposite layer surface forms a stimulation and/or sensor surface for the capacitive stimulation and/or detection of biological tissue. The dielectric layer includes (Tix, Zr1-x)O2, with 0.99nullxnull0.5, or a TiO2 and ZrO2 layer arrangement.

Abstract translation: 本发明涉及用于电容刺激和/或检测生物组织的生物芯片。 生物芯片包括支撑结构，布置在支撑结构中或支撑结构上的至少一个刺激和/或传感器装置，以及至少一个电介质层，其一层表面设置在刺激和/或传感器装置上， 相对的层表面形成用于电容刺激和/或检测生物组织的刺激和/或传感器表面。 介电层包括（Tix，Zr1-x）O2，其中0.99> = x> = 0.5，或TiO 2和ZrO 2层布置。

公开(公告)号：US20040234417A1

公开(公告)日：2004-11-25

申请号：US10803175

申请日：2004-03-16

Applicant: Infineon Technologies AG

Inventor： Meinrad Schienle ,  Ralf Brederlow ,  Franz Hofmann ,  Martin Jenkner ,  Johannes R. Luyken ,  Christian Paulus ,  Petra Schindler-Bauer ,  Roland Thewes

IPC: G01N021/64

CPC classification number: G01N21/6454 ,  G01N33/54373 ,  G01N2201/0642

Abstract: Fluorescence biosensor chip having a substrate, at least one electromagnetic radiation detection device arranged in or on the substrate, an optical filter layer arranged on the substrate, and an immobilization layer, which is arranged on the optical filter layer and immobilizes capture molecules. The electromagnetic radiation detection device, the optical filter layer, and the immobilization layer are integrated in the fluorescence biosensor chip.

Abstract translation: 具有衬底的荧光生物传感器芯片，布置在衬底中或衬底上的至少一个电磁辐射检测器件，布置在衬底上的滤光器层以及固定层，其布置在光学滤光层上并固定捕获分子。 电磁辐射检测装置，光学滤光层和固定层集成在荧光生物传感器芯片中。

公开(公告)号：US20040175742A1

公开(公告)日：2004-09-09

申请号：US10771239

申请日：2004-02-02

Applicant: Infineon Technologies AG

Inventor： Franz Hofmann ,  Richard Johannes Luyken ,  Petra Theresia Schindler-Bauer

IPC: C12Q001/68

CPC classification number: G01N33/552 ,  G01N21/76 ,  G01N33/54366 ,  G01N2021/7763 ,  G01N2223/413

Abstract: A method for detecting macromolecular biopolymers using a macromolecular biopolymer immobilizing unit integrated in or mounted on a substrate. The macromolecular biopolymer immobilizing unit is provided with capture molecules that bind macromolecular biopolymers. A sample is brought into contact with the macromolecular biopolymer immobilizing unit, and the sample contains the macromolecular biopolymers to be detected and bound to the capture molecules. Any capture molecules to which no macromolecular biopolymers have bound are removed, and then generation of a chemiluminescence signal is induced using a label located on the capture molecules. The chemiluminescence signal is detected using a detection unit, which is an integrated circuit in the substrate, resulting in the macromolecular biopolymers being detected.

Abstract translation: 使用集成在或安装在基底上的大分子生物聚合物固定化单元检测大分子生物聚合物的方法。 大分子生物聚合物固定单元具有结合大分子生物聚合物的捕获分子。 使样品与大分子生物聚合物固定单元接触，并且样品含有待检测的大分子生物聚合物并与捕获分子结合。 除去没有大分子生物聚合物结合的任何捕获分子，然后使用位于捕获分子上的标记物诱导化学发光信号的产生。 使用作为基板中的集成电路的检测单元检测化学发光信号，导致检测大分子生物聚合物。

公开(公告)号：US20040183125A1

公开(公告)日：2004-09-23

申请号：US10779557

申请日：2004-02-06

Applicant: Infineon Technologies AG

Inventor： Franz Hofmann ,  Josef Willer

IPC: H01L029/788

CPC classification number: H01L29/7923

Abstract: A memory cell having a source region, a drain region, a source-end control gate, a drain-end control gate, an injection gate arranged between the source-end control gate and the drain-end control gate, a source-end storage element arranged in the source-end control gate, and a drain-end storage element arranged in the drain-end control gate. To program the memory cell, a low electrical voltage is applied to the injection gate, and a high electrical voltage is applied to the control gates.

Abstract translation: 具有源极区域，漏极区域，源极端子控制栅极，漏极端子控制栅极，配置在源极端子控制栅极和漏极端子控制栅极之间的注入栅极的存储单元，源极端子存储器 排列在源极端控制栅极中的漏极端存储元件，以及布置在漏极端控制栅极中的漏极端存储元件。 为了对存储单元进行编程，将低电压施加到注入栅极，并且高电压被施加到控制栅极。

公开(公告)号：US20040097037A1

公开(公告)日：2004-05-20

申请号：US10706841

申请日：2003-11-12

Applicant: Infineon Technologies AG

Inventor： Franz Hofmann ,  Josef Willer

IPC: H01L021/336

CPC classification number: H01L29/66833 ,  H01L29/7923 ,  Y10S438/954

Abstract: A memory layer intended for trapping charge carriers over a source region and a drain region is interrupted over the channel so that a diffusion of the charge carriers, which are trapped over the source region and over the drain region, is prevented. The memory layer is limited to regions over the parts of the source region and of the drain region facing the channel and is embedded all around in oxide.