公开(公告)号：US11127693B2

公开(公告)日：2021-09-21

申请号：US16710044

申请日：2019-12-11

Applicant: Infineon Technologies AG

Inventor： Johann Gatterbauer ,  Katrin Albers ,  Joerg Busch ,  Klaus Goller ,  Norbert Mais ,  Marianne Kolitsch ,  Michael Nelhiebel ,  Rainer Pelzer ,  Bernhard Weidgans

IPC: H01L23/00 ,  B81B7/00 ,  H01L23/58

Abstract: A semiconductor device includes a structured interlayer on a substrate, a structured power metallization on the structured interlayer, and a barrier on the structured power metallization. The barrier is configured to prevent diffusion of at least one of water, water ions, sodium ions, potassium ions, chloride ions, fluoride ions, and sulphur ions towards the structured power metallization. A first defined edge of the structured interlayer faces the same direction as a first defined edge of the structured power metallization and extends beyond the first defined edge of the structured power metallization by at least 0.5 microns. The structured interlayer has a compressive residual stress at room temperature and the structured power metallization generates a tensile stress at room temperature that is at least partly counteracted by the compressive residual stress of the structured interlayer. The first defined edge of the structured power metallization has a sidewall which slopes inward.

公开(公告)号：US20140319688A1

公开(公告)日：2014-10-30

申请号：US14326252

申请日：2014-07-08

Applicant: Infineon Technologies AG

Inventor： Dirk Meinhold ,  Norbert Mais ,  Reimund Engl ,  Hans-Joerg Timme ,  Alfred Vater ,  Stephan Henneck ,  Norbert Urbansky

IPC: H01L23/00 ,  H01L23/532

CPC classification number: H01L23/564 ,  H01L21/7685 ,  H01L21/76852 ,  H01L23/53219 ,  H01L23/53228 ,  H01L23/53238 ,  H01L23/5329 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45664 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48824 ,  H01L2224/4911 ,  H01L2924/01015 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/20752

Abstract: In one embodiment, a method of forming a semiconductor device includes forming a metal line over a substrate and depositing an alloying material layer over a top surface of the metal line. The method further includes forming a protective layer by combining the alloying material layer with the metal line.

Abstract translation: 在一个实施例中，形成半导体器件的方法包括在衬底上形成金属线，并在金属线的顶表面上沉积合金材料层。 该方法还包括通过将合金材料层与金属线组合来形成保护层。

公开(公告)号：US20200227278A1

公开(公告)日：2020-07-16

申请号：US16743571

申请日：2020-01-15

Applicant: Infineon Technologies AG

Inventor： Johann Gatterbauer ,  Wolfgang Lehnert ,  Norbert Mais ,  Verena Muhr ,  Edmund Riedl ,  Harry Sax

IPC: H01L21/48 ,  H01L21/02 ,  H01L21/56 ,  H01L23/495 ,  H01L23/31

Abstract: A method of forming a layer structure is provided. The method may include plasma-treating a metal surface with a hydrogen-containing plasma, thereby forming nucleophilic groups over the metal surface, and forming an organic layer over the metal surface, wherein the organic layer comprises silane and is covalently bonded to the nucleophilic groups.

公开(公告)号：US11328935B2

公开(公告)日：2022-05-10

申请号：US16743571

申请日：2020-01-15

Applicant: Infineon Technologies AG

Inventor： Johann Gatterbauer ,  Wolfgang Lehnert ,  Norbert Mais ,  Verena Muhr ,  Edmund Riedl ,  Harry Sax

IPC: H01L21/48 ,  H01L21/02 ,  H01L21/56 ,  H01L23/31 ,  H01L23/495 ,  C23C14/12

Abstract: A method of forming a layer structure is provided. The method may include plasma-treating a metal surface with a hydrogen-containing plasma, thereby forming nucleophilic groups over the metal surface, and forming an organic layer over the metal surface, wherein the organic layer comprises silane and is covalently bonded to the nucleophilic groups.