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公开(公告)号:US20240102194A1
公开(公告)日:2024-03-28
申请号:US18231099
申请日:2023-08-07
Applicant: YUAN ZE UNIVERSITY , Innolux Corporation
Inventor: Cheng-EN HO , Yu-Lian CHEN , Cheng-Chi WANG , Yu-Jen CHANG , Yung-Sheng LU , Cheng-Yu LEE , Yu-Ming LIN
Abstract: A plating system and a method thereof are disclosed. The plating system performs a N-stage plating drilling filling process in which a M-th stage plating drilling filling process with a M-th current density is performed on a hole of a substrate for a M-th plating time to form a M-th plating layer on the to-be-plated layer, wherein N is a positive integer equal to or greater than 3, and M is a positive integer positive integer in a range of 1 to N. Therefore, the technical effect of providing a higher drilling filling rate than conventional plating filling technology under a condition that a total thickness of plating layers is fixed can be achieved.
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公开(公告)号:US20240038550A1
公开(公告)日:2024-02-01
申请号:US17969703
申请日:2022-10-20
Applicant: InnoLux Corporation
Inventor: Chin-Lung TING , Cheng-Chi WANG , Yu-Jen CHANG , Ju-Li WANG
CPC classification number: H01L21/486 , H01L24/13 , H01L24/11 , H01L23/49838 , H01L23/49827 , C23C14/34 , C23C14/5873 , C23C28/023 , C23C28/322 , C25D7/123 , H01L24/16 , H01L2224/13082 , H01L2224/11462 , H01L2224/13005 , H01L2224/13021 , H01L2224/16227 , H01L2224/16237 , H01L24/32 , H01L2224/32225 , H01L24/73 , H01L2224/73203 , H01L21/6835
Abstract: The present disclosure discloses a manufacturing method of an electronic device. A seed layer is formed on a substrate. After patterning the seed layer to form a plurality of sub-seed layers and a plurality of conductive lines, a metal layer is formed on a plurality of the sub-seed layers. The sub-seed layers include a first sub-seed layer and a second sub-seed layer, and the first sub-seed layer and the second sub-seed layer are separated from each other.
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