公开(公告)号：US20250081354A1

公开(公告)日：2025-03-06

申请号：US18782574

申请日：2024-07-24

Applicant: InnoLux Corporation

Inventor： Cheng-Chi WANG ,  Tzu-Yen CHIU ,  I-Chang LIANG ,  Chen-Fang HSIAO ,  Jui-Jen YUEH

IPC: H05K3/00 ,  H05K1/11 ,  H05K1/18 ,  H05K3/30

Abstract: A method of manufacturing an electronic device includes providing a substrate with a predetermined first-hole region, a first surface, and a second surface. The second surface is opposite the first surface. The method includes laser processing the predetermined first-hole region from the first surface to form a first laser track and laser processing the predetermined first-hole region from the first surface to form a second laser track. The first laser track does not overlap the second laser track. The method further includes etching the predetermined first-hole region to form a first-hole.

公开(公告)号：US20240114619A1

公开(公告)日：2024-04-04

申请号：US18073592

申请日：2022-12-02

Applicant: InnoLux Corporation

Inventor： Cheng-Chi WANG ,  Chin-Ming HUANG ,  Chien-Feng LI ,  Chia-Lin YANG

IPC: H05K1/11 ,  H05K3/40 ,  H05K3/46

CPC classification number: H05K1/113 ,  H05K3/4038 ,  H05K3/4673 ,  H05K2201/0266

Abstract: An electronic device including an electronic unit and a redistribution layer is disclosed. The electronic unit has connection pads. The redistribution layer is electrically connected to the electronic unit and includes a first insulating layer, a first metal layer and a second insulating layer. The first insulating layer is disposed on the electronic unit and has first openings disposed corresponding to the connection pads. The first metal layer is disposed on the first insulating layer and electrically connected to the electronic unit through the connection pads. The second insulating layer is disposed on the first metal layer. The first insulating layer includes first filler particles, and the second insulating layer includes second filler particles. The first filler particles have a first maximum particle size, the second filler particles have a second maximum particle size, and the second maximum particle size is greater than the first maximum particle size.

公开(公告)号：US20240102853A1

公开(公告)日：2024-03-28

申请号：US17980562

申请日：2022-11-04

Applicant: InnoLux Corporation

Inventor： Yu-Chia HUANG ,  Ju-Li WANG ,  Nai-Fang HSU ,  Cheng-Chi WANG ,  Jui-Jen YUEH

IPC: G01J1/04

CPC classification number: G01J1/0437 ,  G01J1/0411

Abstract: An electronic device and a related tiled electronic device are disclosed. The electronic device includes a protective layer, a circuit structure, a sensing element and a control unit. The circuit structure is disposed on the protective layer and surrounds the sensing element. The control unit is disposed between the circuit structure and the protective layer and electrically connected to the sensing element. The protective layer surrounds the control unit and contacts a surface of the circuit structure.

公开(公告)号：US20230095239A1

公开(公告)日：2023-03-30

申请号：US18074525

申请日：2022-12-05

Applicant: InnoLux Corporation

Inventor： Cheng-Chi WANG ,  Yeong-E CHEN ,  Cheng-En CHENG

IPC: H01L21/768 ,  H01L21/683 ,  H01L21/288 ,  H01L21/027 ,  H01L21/48 ,  H01L21/66

Abstract: The present disclosure discloses a method for manufacturing an electronic device, including: setting a basic working area; a photoresist coating process; a development process; an etching process; an exposure process; a metal plating process; and a polishing process, wherein the photoresist coating process, the development process, the etching process, the exposure process, the metal plating process and the polishing process respectively have a maximum optimized process area, and a smallest one of the maximum optimized process areas is selected as the basic working area.

公开(公告)号：US20250089164A1

公开(公告)日：2025-03-13

申请号：US18959663

申请日：2024-11-26

Applicant: Innolux Corporation

Inventor： Cheng-Chi WANG ,  Chin-Ming HUANG ,  Chien-Feng LI ,  Chia-Lin YANG

IPC: H05K1/11 ,  H05K3/40 ,  H05K3/46

Abstract: An electronic device including a die and a connection structure electrically connected to the die is disclosed. The connection structure includes a first insulating layer including an opening, a second insulating layer, a first metal element disposed between the first insulating layer and the second insulating layer, a second metal element disposed in the opening and electrically connected to the first metal element, and a conductive element. The second metal element is electrically connected between the conductive element and the first metal element. A first surface and a second surface of the first insulating layer are contacted with the first metal element and the conductive element respectively. The first insulating layer includes first filling elements, the second insulating layer includes second filling elements, and in a cross-sectional view, a second maximum size of the second filling elements is greater than a first maximum size of the first filling elements.

公开(公告)号：US20240258218A1

公开(公告)日：2024-08-01

申请号：US18402897

申请日：2024-01-03

Applicant: InnoLux Corporation

Inventor： Cheng-Chi WANG ,  Kuan-Hsueh LIN ,  Shih-Kang LIN

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/49811 ,  H01L21/4853 ,  H01L23/3128 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/81385 ,  H01L2224/81405 ,  H01L2224/81455

Abstract: A semiconductor package device is provided. The semiconductor package device includes a circuit substrate having a first terminal end; a chip disposed on the circuit substrate and having a conductive pad; an auxiliary structure disposed between the first terminal end and the conductive pad, wherein the chip is electrically connected to the circuit substrate through the auxiliary structure; and a protective layer disposed on the circuit substrate and surrounding the chip, wherein the width of the first terminal end is greater than or equal to the width of the auxiliary structure.

公开(公告)号：US20240255714A1

公开(公告)日：2024-08-01

申请号：US18409730

申请日：2024-01-10

Applicant: InnoLux Corporation

Inventor： Cheng-Chi WANG ,  Jui-Jen YUEH

IPC: G02B6/42

CPC classification number: G02B6/423 ,  G02B6/4259 ,  G02B6/4283 ,  G02B6/4295

Abstract: The present disclosure provides a semiconductor device, including a substrate structure, a photonic unit, an optical fiber and a chip unit. The substrate structure includes a coupling member. The photonic unit is disposed in a first recess of the coupling member. The optical fiber is disposed in a second recess of the coupling member and optically coupled to the photonic unit. The chip unit is disposed on the substrate structure and electrically connected to the photonic unit through the coupling member. A depth of the second recess is greater than or equal to half a diameter of the optical fiber.

公开(公告)号：US20240172361A1

公开(公告)日：2024-05-23

申请号：US18067859

申请日：2022-12-19

Applicant: InnoLux Corporation

Inventor： Cheng-Chi WANG ,  Kuan-Feng LEE ,  Jui-Jen YUEH

IPC: H05K1/11 ,  H05K1/02 ,  H05K3/40

CPC classification number: H05K1/115 ,  H05K1/0271 ,  H05K1/0274 ,  H05K3/4038 ,  H05K2201/096 ,  H05K2201/09827

Abstract: An electronic device is provided. The electronic device includes a substrate structure, a control unit, a first circuit structure, and an electronic unit. The substrate structure has a conductive via pattern and a dummy via pattern. The control unit is electrically connected to the conductive via pattern. The first circuit structure is electrically connected to the conductive via pattern. The electronic unit is electrically connected to the control unit through the first circuit structure. The dummy via pattern is electrically insulated from the first circuit structure.

公开(公告)号：US20240038550A1

公开(公告)日：2024-02-01

申请号：US17969703

申请日：2022-10-20

Applicant: InnoLux Corporation

Inventor： Chin-Lung TING ,  Cheng-Chi WANG ,  Yu-Jen CHANG ,  Ju-Li WANG

IPC: H01L21/48 ,  H01L23/00 ,  H01L23/498 ,  C23C14/34 ,  C23C14/58 ,  C23C28/02 ,  C23C28/00 ,  C25D7/12

CPC classification number: H01L21/486 ,  H01L24/13 ,  H01L24/11 ,  H01L23/49838 ,  H01L23/49827 ,  C23C14/34 ,  C23C14/5873 ,  C23C28/023 ,  C23C28/322 ,  C25D7/123 ,  H01L24/16 ,  H01L2224/13082 ,  H01L2224/11462 ,  H01L2224/13005 ,  H01L2224/13021 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L24/32 ,  H01L2224/32225 ,  H01L24/73 ,  H01L2224/73203 ,  H01L21/6835

Abstract: The present disclosure discloses a manufacturing method of an electronic device. A seed layer is formed on a substrate. After patterning the seed layer to form a plurality of sub-seed layers and a plurality of conductive lines, a metal layer is formed on a plurality of the sub-seed layers. The sub-seed layers include a first sub-seed layer and a second sub-seed layer, and the first sub-seed layer and the second sub-seed layer are separated from each other.

公开(公告)号：US20230395452A1

公开(公告)日：2023-12-07

申请号：US17811909

申请日：2022-07-12

Applicant: InnoLux Corporation

Inventor： Cheng-Chi WANG ,  Chin-Ming HUANG ,  Yi-Reng CHEN

IPC: H01L23/31 ,  H01L23/00 ,  H01L21/56

CPC classification number: H01L23/3192 ,  H01L24/20 ,  H01L24/19 ,  H01L24/96 ,  H01L21/561 ,  H01L21/566 ,  H01L2924/3512 ,  H01L2224/2101 ,  H01L2224/2105 ,  H01L2224/211 ,  H01L2224/214 ,  H01L2224/95001 ,  H01L2924/3511 ,  H01L23/3171

Abstract: An electronic device and a manufacturing method thereof are provided. The electronic device includes an electronic unit, a first insulating layer, a second insulating layer and a connecting element. The electronic unit includes a first surface, a second surface opposite to the first surface, and a first side surface connecting the first surface to the second surface. The first insulating layer is disposed on the second surface. The second insulating layer is disposed on the first insulating layer. The second insulating layer includes a third surface, a fourth surface opposite to the third surface, and a second side surface connecting the third surface to the fourth surface. The connecting element is disposed on the second insulating layer and is electrically connected to the electronic unit. The third surface of the second insulating layer is in contact with the second surface of the electronic unit.