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公开(公告)号:US20180233189A1
公开(公告)日:2018-08-16
申请号:US15893146
申请日:2018-02-09
Applicant: Intel Corporation
Inventor: Helia A. NAEIMI
IPC: G11C11/16 , G06F12/0897
CPC classification number: G11C11/1673 , G06F12/0897 , G06F2212/222 , G11C11/1675 , G11C11/1693 , G11C13/0004
Abstract: Systems, apparatuses and methods may provide for detecting a read-write condition in which a read operation from a location in magnetoresistive memory such as spin transfer torque (STT) memory is to be followed by a write operation to the location. Additionally, a current level associated with the read operation may be increased, wherein the read operation is conducted from the location at the increased current level. In one example, the increased current level causes a reset of all bits in the location.
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公开(公告)号:US20230388281A1
公开(公告)日:2023-11-30
申请号:US18230588
申请日:2023-08-04
Applicant: Intel Corporation
Inventor: Helia A. NAEIMI , John Andrew FINGERHUT
IPC: H04L9/40
CPC classification number: H04L63/0485 , H04L63/166
Abstract: Examples described herein relate to an interface and circuitry coupled to the interface. The circuitry can provide an endpoint for a Transport Layer Security (TLS) over Remote Direct Memory Access (RDMA) connection with a first network interface device, provide an endpoint for a TLS over RDMA connection with a second network interface device, provide a transport layer endpoint for the packets received from the first network interface device, and provide a transport layer endpoint for the packets received from the second network interface device.
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公开(公告)号:US20230300063A1
公开(公告)日:2023-09-21
申请号:US18200342
申请日:2023-05-22
Applicant: Intel Corporation
Inventor: Helia A. NAEIMI , Amedeo SAPIO , John Andrew FINGERHUT , Yi LI , Yanfang LE
Abstract: Examples described herein relate to a network interface device. The network interface device can include circuitry that is to: receive a first packet comprising a first packet header and a first packet payload; receive multiple subsequent packets comprising multiple packet headers for respective multiple subsequent packets; update at least one of the multiple packet headers; and construct egress packets. In some examples, the egress packets include respective one of the multiple packet headers and the first packet payload.
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公开(公告)号:US20230155988A1
公开(公告)日:2023-05-18
申请号:US18099795
申请日:2023-01-20
Applicant: Intel Corporation
Inventor: Surekha PERI , Helia A. NAEIMI , Anurag AGRAWAL
IPC: H04L9/40
CPC classification number: H04L63/0485 , H04L63/0478 , H04L63/0272
Abstract: Examples described herein relate to a network interface device that includes an interface and circuitry. In some examples, the circuitry coupled to the interface is to apply encryption for packets received from a first network interface device and tunnel the encrypted packets to a second network interface device. In some examples, forwarding operations by the first network interface device and forwarding operations in the second network interface device are based on different header fields.
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公开(公告)号:US20230393814A1
公开(公告)日:2023-12-07
申请号:US18230605
申请日:2023-08-04
Applicant: Intel Corporation
Inventor: Helia A. NAEIMI , John Andrew FINGERHUT
IPC: G06F7/483
CPC classification number: G06F7/483
Abstract: Examples described herein relate to an interface and circuitry coupled to the interface, the circuitry configured to execute instructions that cause the circuitry to perform floating point (FP) operations based on floating point data received in different packets. The order of the floating point operations can be based on a reorder of the data received in the different packets and wherein the reorder of the data received in the different packets is different than the order in which the packets were received.
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公开(公告)号:US20230379309A1
公开(公告)日:2023-11-23
申请号:US18230600
申请日:2023-08-04
Applicant: Intel Corporation
Inventor: Helia A. NAEIMI , John Andrew FINGERHUT
CPC classification number: H04L63/0428 , H04L47/34
Abstract: Examples described herein relate to an interface and circuitry coupled to the interface. The circuitry can provide an endpoint for a PSP Security Protocol (PSP) connection to a first network interface device, provide an endpoint for a second PSP connection with a second network interface device, provide a transport layer endpoint for the packets received from the first network interface device, and provide a second transport layer endpoint for the packets received from the second network interface device.
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公开(公告)号:US20230379154A1
公开(公告)日:2023-11-23
申请号:US18230594
申请日:2023-08-04
Applicant: Intel Corporation
Inventor: Helia A. NAEIMI , John Andrew FINGERHUT
CPC classification number: H04L9/32 , H04L63/166
Abstract: Examples described herein relate to an interface and circuitry coupled to the interface. The circuitry can provide an endpoint for a Datagram Transport Layer Security (DTLS) connection with a first network interface device, provide an endpoint for a second DTLS connection with a second network interface device, provide a transport layer endpoint for the packets received from the first network interface device, and provide a second transport layer endpoint for the packets received from the second network interface device.
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公开(公告)号:US20210211467A1
公开(公告)日:2021-07-08
申请号:US17189219
申请日:2021-03-01
Applicant: Intel Corporation
Inventor: Helia A. NAEIMI , Sivakumar MUNNANGI , Namrata LIMAYE , Arvind SRINIVASAN , Gargi SAHA , Hung NGUYEN , Daniel DALY
IPC: H04L29/06
Abstract: Examples described herein relate to a Transport Layer Security (TLS) offload engine to: based on detection of encrypted data unassociated with a previously detected data header: search for one or more data headers; identify at least two candidate data headers for validation; and based on receipt of an indication that the at least two candidate data headers are valid, perform decryption of received data in one or more packets. In some examples, the TLS offload engine is to: based on receipt of an indication that one or more of the at least two candidate data headers is not a valid header, search for two or more other candidate data headers.
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