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公开(公告)号:US20230090350A1
公开(公告)日:2023-03-23
申请号:US17478439
申请日:2021-09-17
申请人: Intel Corporation
发明人: Kyle MCELHINNY , Haobo CHEN , Hongxia FENG , Xiaoying GUO , Leonel ARANA
IPC分类号: H01L23/538 , H01L23/498 , H01L21/48 , H01L25/065 , H01L23/00
摘要: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a package substrate, and a first pad over the package substrate. In an embodiment, a layer is over the package substrate, where the layer is an insulating material. In an embodiment, the electronic package further comprises a via through the layer and in contact with the first pad. In an embodiment a first end of the via has a first width and a second end of the via that is in contact with the first pad has a second width that is larger than the first width. In an embodiment, the electronic package further comprises a second pad over the via.
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公开(公告)号:US20240105580A1
公开(公告)日:2024-03-28
申请号:US17953213
申请日:2022-09-26
申请人: Intel Corporation
IPC分类号: H01L23/498 , H01L21/48 , H01L23/13 , H01L23/15
CPC分类号: H01L23/49866 , H01L21/4846 , H01L23/13 , H01L23/15 , H01L23/49838
摘要: Embodiments disclosed herein include electronic packages and methods of forming such packages. In an embodiment, the electronic package comprises a core, and a pad over the core. In an embodiment, a shell is around the core, and a surface finish is over the shell. In an embodiment, the electronic package further comprises a solder resist over the pad, where an opening is formed through the solder resist to expose the surface finish.
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公开(公告)号:US20240105576A1
公开(公告)日:2024-03-28
申请号:US17953210
申请日:2022-09-26
申请人: Intel Corporation
发明人: Kyle MCELHINNY , Xiaoying GUO , Hiroki TANAKA , Haobo CHEN
CPC分类号: H01L23/49838 , C25D3/12 , C25D3/48 , C25D3/50 , C25D7/123 , H01L21/481 , H01L21/4846 , H01L23/49866 , H01L24/16
摘要: Embodiments disclosed herein include package substrates and methods of forming package substrates. In an embodiment, the package substrate comprises a core and a pad over the core. In an embodiment, a solder resist is over the pad, and an opening into the solder resist exposes a portion of the pad. In an embodiment, the package substrate further comprises a surface finish over the pad and within the opening.
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公开(公告)号:US20240105575A1
公开(公告)日:2024-03-28
申请号:US17953206
申请日:2022-09-26
申请人: Intel Corporation
发明人: Jason M. GAMBA , Haifa HARIRI , Kristof DARMAWIKARTA , Srinivas V. PIETAMBARAM , Hiroki TANAKA , Kyle MCELHINNY , Xiaoying GUO , Steve S. CHO , Ali LEHAF , Haobo CHEN , Bai NIE , Numair AHMED
CPC分类号: H01L23/49838 , C25D3/12 , C25D3/48 , C25D3/50 , C25D7/123 , H01L21/481 , H01L21/4846 , H01L23/49866 , H01L24/16
摘要: Embodiments disclosed herein include package substrates and methods of forming package substrates. In an embodiment, the package substrate comprises a core, and a pad over the core, where the pad has a first width. In an embodiment, a surface finish is over the pad, where the surface finish has a second width that is substantially equal to the first width. In an embodiment, the package substrate further comprises a solder resist over the pad, where the solder resist comprises an opening that exposes a portion of the surface finish. In an embodiment, the opening has a third width that is smaller than the second width.
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