公开(公告)号：US09691728B2

公开(公告)日：2017-06-27

申请号：US14629350

申请日：2015-02-23

Applicant: INTEL CORPORATION

Inventor： Robert M. Nickerson ,  Min Tao ,  John S. Guzek

IPC: H01L23/52 ,  H01L29/24 ,  H01L23/48 ,  H01L23/49 ,  H05K1/18 ,  H01L23/00 ,  H05K3/46 ,  H01L23/498 ,  H01L23/538 ,  H01L25/18

CPC classification number: H01L24/19 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/4985 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/06 ,  H01L24/16 ,  H01L24/20 ,  H01L24/73 ,  H01L24/92 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/16147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/24225 ,  H01L2224/73259 ,  H01L2224/821 ,  H01L2224/92224 ,  H01L2224/97 ,  H01L2924/00013 ,  H01L2924/10253 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/3511 ,  H05K1/185 ,  H05K1/186 ,  H05K3/4682 ,  H05K2201/10674 ,  H05K2203/1469 ,  H01L2224/81 ,  H01L2224/82 ,  H01L2224/13099 ,  H01L2224/05099 ,  H01L2224/05599 ,  H01L2924/00

Abstract: An apparatus including a die including a first side and an opposite second side including a device side with contact points; and a build-up carrier including at least one layer of conductive material disposed on a first side of the die, and a plurality of alternating layers of conductive material and dielectric material disposed on the second side of the die, wherein the at least one layer of conductive material on the first side of the die is coupled to at least one of (1) at least one of the alternating layers of conductive material on the second side of the die and (2) at least one of the contact points of the die. A method including forming a first portion of a build-up carrier adjacent one side of a die, and forming a second portion of the build-up carrier adjacent another side of the die.

公开(公告)号：US09617148B2

公开(公告)日：2017-04-11

申请号：US15176467

申请日：2016-06-08

Applicant: Intel Corporation

Inventor： Qing Ma ,  Johanna M. Swan ,  Min Tao ,  Charles A. Gealer ,  Edward T. Zarbock

IPC: H01L21/00 ,  B81C1/00 ,  H01L23/48 ,  H01L23/00 ,  G01P15/08 ,  B81B7/00 ,  H01L25/065 ,  H01L23/498 ,  H01L23/538

CPC classification number: B81C1/00301 ,  B81B7/007 ,  B81C1/00238 ,  B81C2203/0145 ,  G01P15/0802 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/5384 ,  H01L24/03 ,  H01L25/0652 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2924/01327 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/00 ,  H01L2924/014

Abstract: Integration of sensor chips with integrated circuit (IC) chips. At least a first sensor chip including a first sensor is affixed to a first side of an interposer to hermetically seal the first sensor within a first cavity. An IC chip is affixed to a second side of the interposer opposite the first sensor, the IC chip is electrically coupled to the first sensor by a through via in the interposer. In embodiments, the first sensor includes a MEMS device and the IC chip comprises a circuit to amplify a signal from the MEMS device. The interposer may be made of glass, with the first sensor chip and the IC chip flip-chip bonded to the interposer by compression or solder. Lateral interconnect traces provide I/O between the devices on the interposer and/or a PCB upon which the interpose is affixed.