公开(公告)号：US09645942B2

公开(公告)日：2017-05-09

申请号：US13976181

申请日：2013-03-15

申请人： Intel Corporation

发明人： Ferad Zyulkyarov ,  Nevin Hyuseinova ,  Qiong Cai ,  Blas Cuesta ,  Serkan Ozdemir ,  Marios Nicolaides

IPC分类号： G06F12/00 ,  G06F12/1045 ,  G06F12/0897 ,  G06F12/126 ,  G06F12/0895

CPC分类号： G06F12/1045 ,  G06F12/0895 ,  G06F12/0897 ,  G06F12/126 ,  G06F2212/6022

摘要： A method to request memory from a far memory cache and implement, at an operating system (OS) level, a fully associative cache on the requested memory. The method includes pinning the working set of a program into the requested memory (pin buffer) so that it is not evicted due to cache conflicts and is served from the fast cache and not the slower next level memory. The requested memory extends the physical address space and is visible to and managed by the OS. The OS has the ability to make the requested memory visible to the user programs. The OS has the ability to manage the requested memory from the far memory cache as both a fully associative cache and a set associative cache.

公开(公告)号：US09558120B2

公开(公告)日：2017-01-31

申请号：US14227940

申请日：2014-03-27

申请人： Intel Corporation

发明人： Dyer Rolan ,  Nevin Hyuseinova ,  Blas A. Cuesta ,  Qiong Cai

IPC分类号： G06F12/08 ,  G06F12/12

CPC分类号： G06F12/0833 ,  G06F12/0811 ,  G06F12/0846 ,  G06F12/0864 ,  G06F12/0871 ,  G06F12/0895 ,  G06F12/0897 ,  G06F12/122 ,  G06F12/123 ,  G06F12/126 ,  G06F2212/1024 ,  G06F2212/1044 ,  G06F2212/502 ,  G06F2212/604 ,  G06F2212/62

摘要： Techniques and mechanism to provide a cache of cache tags in determining an access to cached data. In an embodiment, a tag storage stores a first set including tags associated with respective data locations of a cache memory. A cache of cache tags store a subset of tags stored by the tag storage. In response to any determination that a tag of the first set is to be stored to the cache of cache tags, all tags of the first set are stored to the first portion. Any storage of tags of the first set to the cache of cache tags includes storage of the tags of the first set to only a first portion of the cache of cache tags. In another embodiment, a replacement table is maintained for use in determining, based on an indicated level of activity for a set of the cache of cache tags, whether the set is to be selected for eviction and replacement of cached tags.

摘要翻译： 在确定对缓存数据的访问时提供高速缓存标签缓存的技术和机制。 在一个实施例中，标签存储存储包括与高速缓冲存储器的相应数据位置相关联的标签的第一集合。 缓存标签的缓存存储标签存储器存储的标签的子集。 响应于将第一组的标签存储到高速缓存标签的高速缓存中的任何确定，第一组的所有标签都被存储到第一部分。 将第一组的标签的任何存储器存储到缓存标签的高速缓存包括将第一集合的标签仅存储在高速缓存标签的高速缓存的仅第一部分。 在另一个实施例中，维护替换表用于基于指定的高速缓存标签的高速缓存的一组指定的活动级别来确定该集合是否被选择用于缓存和替换高速缓存的标签。

公开(公告)号：US20150227469A1

公开(公告)日：2015-08-13

申请号：US13976181

申请日：2013-03-15

申请人： Intel Corporation

发明人： Ferad Zyulkyarov ,  Nevin Hyuseinova ,  Qiong Cai ,  Blas Cuesta ,  Serkan Ozdemir ,  Marios Nicolaides

IPC分类号： G06F12/10 ,  G06F12/08

CPC分类号： G06F12/1045 ,  G06F12/0895 ,  G06F12/0897 ,  G06F12/126 ,  G06F2212/6022

摘要： A method to request memory from a far memory cache and implement, at an operating system (OS) level, a fully associative cache on the requested memory. The method includes pinning the working set of a program into the requested memory (pin buffer) so that it is not evicted due to cache conflicts and is served from the fast cache and not the slower next level memory. The requested memory extends the physical address space and is visible to and managed by the OS. The OS has the ability to make the requested memory visible to the user programs. The OS has the ability to manage the requested memory from the far memory cache as both a fully associative cache and a set associative cache.

摘要翻译： 一种从远存储器高速缓存请求存储器并且在操作系统（OS）级别）实现所请求存储器上的完全关联高速缓存的方法。 该方法包括将程序的工作集锁定到所请求的存储器（引脚缓冲器）中，使得它不会由于缓存冲突而被驱逐，并且从快速缓存而不是较慢的下一级存储器提供。 所请求的内存扩展了物理地址空间，并且由操作系统可见和管理。 操作系统能够使所请求的内存对用户程序可见。 操作系统能够将远程存储器缓存中所请求的存储器作为完全关联缓存和集合关联高速缓存进行管理。