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公开(公告)号:US20170207152A1
公开(公告)日:2017-07-20
申请号:US15478064
申请日:2017-04-03
申请人: Intel Corporation
发明人: Thomas J. De Bonis , Lilia May , Rajen S. Sidhu , Mukul P. Renavikar , Ashay A. Dani , Edward R. Prack , Carl L. Deppisch , Anna M. Prakash , James C. Matayabas , Jason Jieping Zhang , Srinivasa R. Aravamudhan , Chang Lin
IPC分类号: H01L23/498 , H01L23/31 , H01L25/00 , H01L21/48 , H01L21/56 , H01L21/768 , H01L25/065 , H01L23/00
CPC分类号: H01L23/49816 , H01L21/4853 , H01L21/565 , H01L21/76802 , H01L23/3128 , H01L23/49822 , H01L24/16 , H01L24/17 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/13023 , H01L2224/16227 , H01L2224/16238 , H01L2225/06513 , H01L2225/06517 , H01L2225/0652 , H01L2225/06548 , H01L2225/06586 , H01L2225/1023 , H01L2225/1058 , H01L2924/12042 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/1815 , H01L2924/37001 , H01L2924/00
摘要: An apparatus is described that includes a substrate and a mold compound disposed on the substrate. The semiconductor die is embedded within the mold compound and is electrically coupled to lands on the substrate. Solder balls are disposed around the semiconductor die on the substrate. Each of the solder balls have a solid coating thereon. The solid coating contains a cleaning agent to promote its solder ball's coalescence with another solder ball. Respective vias are formed in the mold compound that expose the solder balls and their respective solid coatings. In combined or alternate embodiments outer edges of the mold compound have smaller thickness than regions of the mold compound between the vias and the semiconductor die. In combined or alternate embodiments micro-channels exist between the solder balls and the mold compound.
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公开(公告)号:US11222877B2
公开(公告)日:2022-01-11
申请号:US15721235
申请日:2017-09-29
申请人: Intel Corporation
发明人: Omkar Karhade , Robert L. Sankman , Nitin A. Deshpande , Mitul Modi , Thomas J. De Bonis , Robert M. Nickerson , Zhimin Wan , Haifa Hariri , Sri Chaitra J. Chavali , Nazmiye Acikgoz Akbay , Fadi Y. Hafez , Christopher L. Rumer
IPC分类号: H01L25/10 , H01L23/367 , H01L25/00 , H01L23/373 , H01L23/42 , H01L23/498
摘要: The present disclosure is directed to systems and methods for improving heat distribution and heat removal efficiency in PoP semiconductor packages. A PoP semiconductor package includes a first semiconductor package that is physically, communicably, and conductively coupled to a stacked second semiconductor package. A thermally conductive member that includes at least one thermally conductive member may be disposed between the first semiconductor package and the second semiconductor package. The thermally conductive member may include: a single thermally conductive element; multiple thermally conductive elements; or a core that includes at least one thermally conductive element. The thermally conductive elements are thermally conductively coupled to an upper surface of the first semiconductor package and to the lower surface of the second semiconductor package to facilitate the transfer of heat from the first semiconductor package to the second semiconductor package.
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公开(公告)号:US20190371778A1
公开(公告)日:2019-12-05
申请号:US15996870
申请日:2018-06-04
申请人: Intel Corporation
发明人: Robert L. Sankman , Sairam Agraharam , Shengquan Ou , Thomas J. De Bonis , Todd Spencer , Yang Sun , Guotao Wang
IPC分类号: H01L25/00 , H01L21/56 , H01L23/538 , H01L25/18 , H01L23/00
摘要: An electronic device may include a first die that may include a first set of die contacts. The electronic device may include a second die that may include a second set of die contacts. The electronic device may include a bridge interconnect that may include a first set of bridge contacts and may include a second set of bridge contacts. The first set of bridge contacts may be directly coupled to the first set of die contacts (e.g., with an interconnecting material, such as solder). The second set of bridge contacts may be directly coupled to the second set of die contacts (e.g., with solder). The bridge interconnect may help facilitate electrical communication between the first die and the second die.
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公开(公告)号:US10049971B2
公开(公告)日:2018-08-14
申请号:US15478064
申请日:2017-04-03
申请人: Intel Corporation
发明人: Thomas J. De Bonis , Lilia May , Rajen S. Sidhu , Mukul P. Renavikar , Ashay A. Dani , Edward R. Prack , Carl L. Deppisch , Anna M. Prakash , James C. Matayabas , Jason Jieping Zhang , Srinivasa R. Aravamudhan , Chang Lin
IPC分类号: H01L21/00 , H01L23/498 , H01L25/065 , H01L23/31 , H01L25/10 , H01L21/48 , H01L21/56 , H01L21/768 , H01L25/00 , H01L23/00
摘要: An apparatus is described that includes a substrate and a mold compound disposed on the substrate. The semiconductor die is embedded within the mold compound and is electrically coupled to lands on the substrate. Solder balls are disposed around the semiconductor die on the substrate. Each of the solder balls have a solid coating thereon. The solid coating contains a cleaning agent to promote its solder ball's coalescence with another solder ball. Respective vias are formed in the mold compound that expose the solder balls and their respective solid coatings. In combined or alternate embodiments outer edges of the mold compound have smaller thickness than regions of the mold compound between the vias and the semiconductor die. In combined or alternate embodiments micro-channels exist between the solder balls and the mold compound.
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