公开(公告)号：US20160170881A1

公开(公告)日：2016-06-16

申请号：US14903833

申请日：2014-07-03

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： GUY LYNN GUTHRIE ,  NARESH NAYAR ,  GERAINT NORTH ,  HUGH SHEN ,  WILLIAM STARKE ,  PHILLIP WILLIAMS

IPC: G06F12/08 ,  G06F3/06 ,  G06F9/455

CPC classification number: G06F11/1451 ,  G06F3/0619 ,  G06F3/065 ,  G06F3/0652 ,  G06F3/0685 ,  G06F9/45558 ,  G06F11/1438 ,  G06F11/1484 ,  G06F11/2023 ,  G06F11/2097 ,  G06F12/0804 ,  G06F12/0806 ,  G06F12/0875 ,  G06F12/0891 ,  G06F12/109 ,  G06F12/12 ,  G06F2009/45583 ,  G06F2009/45591 ,  G06F2201/885 ,  G06F2212/1032 ,  G06F2212/152 ,  G06F2212/281 ,  G06F2212/313 ,  G06F2212/60 ,  G06F2212/608

Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.

Abstract translation: 计算机系统包括处理器单元，其被配置为运行运行一个或多个虚拟机的管理程序; 连接到所述处理器单元并且包括多个高速缓存行的高速缓存，每个高速缓存行包括存储器地址，高速缓存行和图像修改标志; 以及连接到高速缓存并被布置成存储至少一个虚拟机的图像的存储器。 处理器单元被布置为在存储器中定义日志，并且高速缓存还包括高速缓存控制器，该高速缓存控制器被布置为为被备份的虚拟机修改的高速缓存行设置图像修改标志，但不对于由管理程序修改的高速缓存线 在特权模式下运行; 定期检查图像修改标志; 并且只写入定义的日志中标记的高速缓存行的内存地址。

公开(公告)号：US20160154663A1

公开(公告)日：2016-06-02

申请号：US14903891

申请日：2014-07-02

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： GUY LYNN GUTHRIE ,  NARESH NAYAR ,  GERAINT NORTH ,  HUGH SHEN ,  WILLIAM STARKE ,  PHILLIP WILLIAMS

IPC: G06F9/455 ,  G06F11/14

CPC classification number: G06F11/1451 ,  G06F9/45533 ,  G06F9/45558 ,  G06F11/1438 ,  G06F11/1458 ,  G06F11/1484 ,  G06F12/0804 ,  G06F12/0842 ,  G06F12/0891 ,  G06F12/0895 ,  G06F2009/45583 ,  G06F2201/805 ,  G06F2201/815 ,  G06F2201/885 ,  G06F2212/1016 ,  G06F2212/1032 ,  G06F2212/1044 ,  G06F2212/152 ,  G06F2212/60

Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.

公开(公告)号：US20180357129A1

公开(公告)日：2018-12-13

申请号：US16108236

申请日：2018-08-22

Applicant: International Business Machines Corporation

Inventor： GUY LYNN GUTHRIE ,  NARESH NAYAR ,  GERAINT NORTH ,  HUGH SHEN ,  WILLIAM STARKE ,  PHILLIP WILLIAMS

IPC: G06F11/14 ,  G06F12/0891 ,  G06F3/06 ,  G06F9/455 ,  G06F11/20 ,  G06F12/0804 ,  G06F12/0806 ,  G06F12/12 ,  G06F12/109 ,  G06F12/0875

CPC classification number: G06F11/1451 ,  G06F3/0619 ,  G06F3/065 ,  G06F3/0652 ,  G06F3/0685 ,  G06F9/45558 ,  G06F11/1438 ,  G06F11/1484 ,  G06F11/2023 ,  G06F11/2097 ,  G06F12/0804 ,  G06F12/0806 ,  G06F12/0875 ,  G06F12/0891 ,  G06F12/109 ,  G06F12/12 ,  G06F2009/45583 ,  G06F2009/45591 ,  G06F2201/885 ,  G06F2212/1032 ,  G06F2212/152 ,  G06F2212/281 ,  G06F2212/313 ,  G06F2212/60 ,  G06F2212/608

Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.

公开(公告)号：US20180067816A1

公开(公告)日：2018-03-08

申请号：US15805639

申请日：2017-11-07

Applicant: International Business Machines Corporation

Inventor： GUY LYNN GUTHRIE ,  NARESH NAYAR ,  GERAINT NORTH ,  HUGH SHEN ,  WILLIAM STARKE ,  PHILLIP WILLIAMS

IPC: G06F11/14 ,  G06F9/455

CPC classification number: G06F11/1451 ,  G06F9/45533 ,  G06F9/45558 ,  G06F11/1438 ,  G06F11/1458 ,  G06F11/1484 ,  G06F12/0804 ,  G06F12/0842 ,  G06F12/0891 ,  G06F12/0895 ,  G06F2009/45583 ,  G06F2201/805 ,  G06F2201/815 ,  G06F2201/885 ,  G06F2212/1016 ,  G06F2212/1032 ,  G06F2212/1044 ,  G06F2212/152 ,  G06F2212/60

Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.

公开(公告)号：US20190042439A1

公开(公告)日：2019-02-07

申请号：US15668452

申请日：2017-08-03

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： BERNARD DRERUP ,  GUY L. GUTHRIE ,  JEFFREY STUECHELI ,  PHILLIP WILLIAMS

IPC: G06F12/0864 ,  G06F12/0815 ,  G06F12/0893

Abstract: A set-associative cache memory includes a plurality of ways and a plurality of congruence classes. Each of the plurality of congruence classes includes a plurality of members each belonging to a respective one of the plurality of ways. In the cache memory, a data structure records a history of an immediately previous N ways from which cache lines have been evicted. In response to receipt of a memory access request specifying a target address, a selected congruence class among a plurality of congruence classes is selected based on the target address. At least one member of the selected congruence class is removed as a candidate for selection for victimization based on the history recorded in the data structure, and a member from among the remaining members of the selected congruence class is selected. The cache memory then evicts the victim cache line cached in the selected member of the selected congruence class.

公开(公告)号：US20190004902A1

公开(公告)日：2019-01-03

申请号：US16106764

申请日：2018-08-21

Applicant: International Business Machines Corporation

Inventor： GUY LYNN GUTHRIE ,  NARESH NAYAR ,  GERAINT NORTH ,  HUGH SHEN ,  WILLIAM STARKE ,  PHILLIP WILLIAMS

IPC: G06F11/14 ,  G06F9/455 ,  G06F12/0895 ,  G06F12/0842 ,  G06F12/0891 ,  G06F12/0804

Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.

公开(公告)号：US20180357131A1

公开(公告)日：2018-12-13

申请号：US16108583

申请日：2018-08-22

Applicant: International Business Machines Corporation

Inventor： GUY LYNN GUTHRIE ,  NARESH NAYAR ,  GERAINT NORTH ,  HUGH SHEN ,  WILLIAM STARKE ,  PHILLIP WILLIAMS

IPC: G06F11/14 ,  G06F12/0891 ,  G06F3/06 ,  G06F9/455 ,  G06F11/20 ,  G06F12/0804 ,  G06F12/0806 ,  G06F12/12 ,  G06F12/109 ,  G06F12/0875

CPC classification number: G06F11/1451 ,  G06F3/0619 ,  G06F3/065 ,  G06F3/0652 ,  G06F3/0685 ,  G06F9/45558 ,  G06F11/1438 ,  G06F11/1484 ,  G06F11/2023 ,  G06F11/2097 ,  G06F12/0804 ,  G06F12/0806 ,  G06F12/0875 ,  G06F12/0891 ,  G06F12/109 ,  G06F12/12 ,  G06F2009/45583 ,  G06F2009/45591 ,  G06F2201/885 ,  G06F2212/1032 ,  G06F2212/152 ,  G06F2212/281 ,  G06F2212/313 ,  G06F2212/60 ,  G06F2212/608

Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.

公开(公告)号：US20180074911A1

公开(公告)日：2018-03-15

申请号：US15805326

申请日：2017-11-07

Applicant: International Business Machines Corporation

Inventor： GUY LYNN GUTHRIE ,  NARESH NAYAR ,  GERAINT NORTH ,  HUGH SHEN ,  WILLIAM STARKE ,  PHILLIP WILLIAMS

IPC: G06F11/14 ,  G06F9/455

CPC classification number: G06F11/1451 ,  G06F9/45533 ,  G06F9/45558 ,  G06F11/1438 ,  G06F11/1458 ,  G06F11/1484 ,  G06F12/0804 ,  G06F12/0842 ,  G06F12/0891 ,  G06F12/0895 ,  G06F2009/45583 ,  G06F2201/805 ,  G06F2201/815 ,  G06F2201/885 ,  G06F2212/1016 ,  G06F2212/1032 ,  G06F2212/1044 ,  G06F2212/152 ,  G06F2212/60

Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.

公开(公告)号：US20160217045A1

公开(公告)日：2016-07-28

申请号：US15048101

申请日：2016-02-19

Applicant: International Business Machines Corporation

Inventor： GUY LYNN GUTHRIE ,  NARESH NAYAR ,  GERAINT NORTH ,  HUGH SHEN ,  WILLIAM STARKE ,  PHILLIP WILLIAMS

IPC: G06F11/14 ,  G06F12/12 ,  G06F9/455 ,  G06F12/08

CPC classification number: G06F11/1451 ,  G06F3/0619 ,  G06F3/065 ,  G06F3/0652 ,  G06F3/0685 ,  G06F9/45558 ,  G06F11/1438 ,  G06F11/1484 ,  G06F11/2023 ,  G06F11/2097 ,  G06F12/0804 ,  G06F12/0806 ,  G06F12/0875 ,  G06F12/0891 ,  G06F12/109 ,  G06F12/12 ,  G06F2009/45583 ,  G06F2009/45591 ,  G06F2201/885 ,  G06F2212/1032 ,  G06F2212/152 ,  G06F2212/281 ,  G06F2212/313 ,  G06F2212/60 ,  G06F2212/608

Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.

公开(公告)号：US20160210197A1

公开(公告)日：2016-07-21

申请号：US15048281

申请日：2016-02-19

Applicant: International Business Machines Corporation

Inventor： GUY LYNN GUTHRIE ,  NARESH NAYAR ,  GERAINT NORTH ,  HUGH SHEN ,  WILLIAM STARKE ,  PHILLIP WILLIAMS

IPC: G06F11/14 ,  G06F9/455 ,  G06F12/08

CPC classification number: G06F11/1451 ,  G06F9/45533 ,  G06F9/45558 ,  G06F11/1438 ,  G06F11/1458 ,  G06F11/1484 ,  G06F12/0804 ,  G06F12/0842 ,  G06F12/0891 ,  G06F12/0895 ,  G06F2009/45583 ,  G06F2201/805 ,  G06F2201/815 ,  G06F2201/885 ,  G06F2212/1016 ,  G06F2212/1032 ,  G06F2212/1044 ,  G06F2212/152 ,  G06F2212/60

Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.