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公开(公告)号：US20240258795A1
公开(公告)日：2024-08-01
申请号：US18103273
申请日：2023-01-30
发明人： George Paulik , Timothy Lindquist , George Russell Zettles, IV , Jarrett Betke , Daniel Ramirez , Timothy Clyde Buchholtz , Kevin O'Connell , Austin Carter
摘要： Techniques are provided to convert utility power having an unstable utility frequency into supply power having a stable frequency, which can be distributed and utilized as a system reference. For example, a system comprises a power generator and a power distribution system. The power generator is configured to convert utility power having an unstable utility frequency to supply power having a stable frequency component. The power distribution system is coupled to an output of the power generator, and is configured to distribute the supply power having the stable frequency component to at least one power consumer which is configured to utilize the stable frequency component of the supply power as a reference frequency.
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公开(公告)号：US11990949B2
公开(公告)日：2024-05-21
申请号：US17817834
申请日：2022-08-05
发明人： Kevin Daniel Escobar , Layne A. Berge , George Paulik , George Russell Zettles, IV , Daniel Ramirez , Jarrett Betke , Karl Erickson , Timothy Clyde Buchholtz , Timothy Lindquist
CPC分类号： H04B17/11 , H04B17/101 , H04B17/15
摘要： One or more systems, devices, and/or methods provided herein relate to a process for in-process radio frequency (RF) signal quality analysis and amplitude adjustment of one or more RF devices. In one or more embodiments, the RF device can comprise a portion of a quantum computing system, such as of readout electronics thereof, and thus amplitude adjustment can be at a waveform generator that generates pulses to affect one or more qubits of a quantum logic circuit of the quantum computing system. Generally, an electronic device can comprise an RF tap connected to an RF signal component of a first RF signal chain, and an analysis component connected to the RF tap, the analysis component configured to convert an RF signal from the RF signal component and to compare a conversion result thereof to an expected power output that is based on historical data for a second RF signal chain.
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公开(公告)号：US20240063810A1
公开(公告)日：2024-02-22
申请号：US17820390
申请日：2022-08-17
IPC分类号： H03M1/10
CPC分类号： H03M1/1071
摘要： Systems, compute-implemented methods, and computer program products to facilitate automated waveform validation are provided. According to an embodiment, a system can comprise a processor that executes computer executable components stored in memory. The computer executable components comprise a waveform comparison component that compares a digital conversion of an analog signal to a reference signal.
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公开(公告)号：US11567887B2
公开(公告)日：2023-01-31
申请号：US17018531
申请日：2020-09-11
IPC分类号： G06F13/362 , G06N10/00 , G06F1/12
摘要： Techniques regarding routing qubit data are provided. For example, one or more embodiments described herein can comprise a computer-implemented method for training a quantum controller fast path interface that can control the qubit data routing. The computer-implemented method can comprise training, by a system operatively coupled to a processor, the quantum controller fast path interface for routing qubit data bits between a quantum controller and conditional engine by adjusting a delay value such that a mesochronous clock domain is characterized by a direct register-to-register transfer pattern.
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公开(公告)号：US20220083488A1
公开(公告)日：2022-03-17
申请号：US17018531
申请日：2020-09-11
IPC分类号： G06F13/362 , G06N10/00 , G06F1/12
摘要： Techniques regarding routing qubit data are provided. For example, one or more embodiments described herein can comprise a computer-implemented method for training a quantum controller fast path interface that can control the qubit data routing. The computer-implemented method can comprise training, by a system operatively coupled to a processor, the quantum controller fast path interface for routing qubit data bits between a quantum controller and conditional engine by adjusting a delay value such that a mesochronous clock domain is characterized by a direct register-to-register transfer pattern.
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公开(公告)号：US12101098B2
公开(公告)日：2024-09-24
申请号：US17820390
申请日：2022-08-17
CPC分类号： H03M1/1071 , H03M1/00 , H03M1/12
摘要： Systems, compute-implemented methods, and computer program products to facilitate automated waveform validation are provided. According to an embodiment, a system can comprise a processor that executes computer executable components stored in memory. The computer executable components comprise a waveform comparison component that compares a digital conversion of an analog signal to a reference signal.
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公开(公告)号：US20240048251A1
公开(公告)日：2024-02-08
申请号：US17817834
申请日：2022-08-05
发明人： Kevin Daniel Escobar , Layne A. Berge , George Paulik , George Russell Zettles, IV , Daniel Ramirez , Jarrett Betke , Karl Erickson , Timothy Clyde Buchholtz , Timothy Lindquist
CPC分类号： H04B17/11 , H04B17/101 , H04B17/15
摘要： One or more systems, devices, and/or methods provided herein relate to a process for in-process radio frequency (RF) signal quality analysis and amplitude adjustment of one or more RF devices. In one or more embodiments, the RF device can comprise a portion of a quantum computing system, such as of readout electronics thereof, and thus amplitude adjustment can be at a waveform generator that generates pulses to affect one or more qubits of a quantum logic circuit of the quantum computing system. Generally, an electronic device can comprise an RF tap connected to an RF signal component of a first RF signal chain, and an analysis component connected to the RF tap, the analysis component configured to convert an RF signal from the RF signal component and to compare a conversion result thereof to an expected power output that is based on historical data for a second RF signal chain.
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公开(公告)号：US11695424B2
公开(公告)日：2023-07-04
申请号：US17456207
申请日：2021-11-23
发明人： Jarrett Betke , George Russell Zettles, IV , Timothy Lindquist , George Paulik , Timothy Clyde Buchholtz , Karl Erickson , Daniel Ramirez
CPC分类号： H03M1/1245 , H03L7/091 , H03L7/146
摘要： An apparatus includes a sampling circuit, a sense circuit, and a tuning circuit. The sampling circuit samples an input signal according to a sampling clock signal to produce a sampled signal. The sense circuit determines a scaling factor based on a distortion in the sampled signal caused by the sampling clock signal. The tuning circuit generates an offset signal based on the sampling clock signal and the scaling factor. The offset signal reduces the distortion in the sampled signal caused by the sampling clock signal.
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公开(公告)号：US20220413864A1
公开(公告)日：2022-12-29
申请号：US17355767
申请日：2021-06-23
发明人： Timothy Lindquist , George Russell Zettles, IV , Jarrett Betke , Daniel Ramirez , George Paulik
摘要： Systems, computer-implemented methods and/or computer program products are provided for facilitating waveform synthesis. A system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a composing component that compresses data defining a waveform by employing amplitude partitioning of the data using equivalent sizing. The composing component can further employ run-length encoding to generate a string of integers representing a plurality of groups of the data as partitioned according both to amplitude and progressing time. In an embodiment, a decoding component can employ a binary search to decode a running sum array of integers representing at least a portion of the data, to decompress the data.
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公开(公告)号：US20240305049A1
公开(公告)日：2024-09-12
申请号：US18178690
申请日：2023-03-06
发明人： Kevin O'Connell , Timothy Clyde Buchholtz , George Russell Zettles, IV , Karl Erickson , George Paulik , Jarrett Betke , Timothy Lindquist , Daniel Ramirez
IPC分类号： H01R24/38 , H01R13/502 , H01R13/627 , H01R13/629 , H01R13/641
CPC分类号： H01R24/38 , H01R13/502 , H01R13/627 , H01R13/629 , H01R13/641
摘要： A cable connector for counting a number of plug-in events and preventing further plug in attempts after a threshold number of plug-in events have occurred. An inner sleeve is located inside an outer sleeve, and is designed to move relative to the outer sleeve. The inner sleeve further includes a tab on an outer surface of the inner sleeve. A gear wheel is located inside the outer sleeve and perpendicular to the inner sleeve and has a number of gear teeth. A toggle plug counter rotates the gear wheel one tooth in response to a plug-in action of the cable counter. When the gear wheel rotates to a point where the tab aligns with a notch in the gear wheel an inner spring at the opposite end of the inner sleeve causes the inner sleeve to move through the gear wheel such that further plugging action becomes difficult.
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