公开(公告)号：US20180351002A1

公开(公告)日：2018-12-06

申请号：US16057579

申请日：2018-08-07

申请人： International Business Machines Corporation ,  Globalfoundries Inc.

发明人： Kangguo Cheng ,  Xin Miao ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： H01L29/786 ,  H01L29/06 ,  H01L29/66 ,  H01L29/423

CPC分类号： H01L29/78696 ,  H01L29/0649 ,  H01L29/0673 ,  H01L29/42384 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66742 ,  H01L29/78618 ,  H01L29/78654 ,  H01L29/78684 ,  H01L29/78687

摘要： In one aspect, a method of forming a semiconductor device includes the steps of: forming an alternating series of sacrificial/active layers on a wafer and patterning it into at least one nano device stack; forming a dummy gate on the nano device stack; patterning at least one upper active layer in the nano device stack to remove all but a portion of the at least one upper active layer beneath the dummy gate; forming spacers on opposite sides of the dummy gate covering the at least one upper active layer that has been patterned; forming source and drain regions on opposite sides of the nano device stack, wherein the at least one upper active layer is separated from the source and drain regions by the spacers; and replacing the dummy gate with a replacement gate. A masking process is also provided to tailor the effective device width of select devices.

公开(公告)号：US10069015B2

公开(公告)日：2018-09-04

申请号：US15276372

申请日：2016-09-26

申请人： International Business Machines Corporation ,  Globalfoundries Inc.

发明人： Kangguo Cheng ,  Xin Miao ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： H01L29/06 ,  H01L29/786 ,  H01L29/423 ,  H01L29/66

摘要： In one aspect, a method of forming a semiconductor device includes the steps of: forming an alternating series of sacrificial/active layers on a wafer and patterning it into at least one nano device stack; forming a dummy gate on the nano device stack; patterning at least one upper active layer in the nano device stack to remove all but a portion of the at least one upper active layer beneath the dummy gate; forming spacers on opposite sides of the dummy gate covering the at least one upper active layer that has been patterned; forming source and drain regions on opposite sides of the nano device stack, wherein the at least one upper active layer is separated from the source and drain regions by the spacers; and replacing the dummy gate with a replacement gate. A masking process is also provided to tailor the effective device width of select devices.

公开(公告)号：US20180212024A1

公开(公告)日：2018-07-26

申请号：US15925051

申请日：2018-03-19

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GlobalFoundries Inc.

发明人： Kangguo Cheng ,  Xin Miao ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： H01L29/06 ,  H01L29/786 ,  H01L21/02 ,  H01L29/775 ,  H01L29/66 ,  H01L29/423 ,  H01L27/12 ,  H01L27/092 ,  H01L21/84 ,  H01L21/8238 ,  H01L21/265

CPC分类号： H01L29/0673 ,  B82Y10/00 ,  H01L21/02236 ,  H01L21/02238 ,  H01L21/02252 ,  H01L21/02532 ,  H01L21/02603 ,  H01L21/26566 ,  H01L21/823807 ,  H01L21/84 ,  H01L27/092 ,  H01L27/0922 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66742 ,  H01L29/66772 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78654 ,  H01L29/78684 ,  H01L29/78696

摘要： A method of making a nanowire device includes disposing a first nanowire stack over a substrate, the first nanowire stack including alternating layers of a first and second semiconducting material, the first semiconducting material contacting the substrate and the second semiconducting material being an exposed surface; disposing a second nanowire stack over the substrate, the second nanowire stack including alternating layers of the first and second semiconducting materials, the first semiconducting material contacting the substrate and the second semiconducting material being an exposed surface; forming a first gate spacer along a sidewall of a first gate region on the first nanowire stack and a second gate spacer along a sidewall of a second gate region on the second nanowire stack; oxidizing a portion of the first nanowire stack within the first gate spacer; and removing the first semiconducting material from the first nanowire stack and the second nanowire stack.

公开(公告)号：US10388731B2

公开(公告)日：2019-08-20

申请号：US15925051

申请日：2018-03-19

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GlobalFoundries Inc.

发明人： Kangguo Cheng ,  Xin Miao ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： B82Y10/00 ,  H01L21/02 ,  H01L21/84 ,  H01L27/12 ,  H01L29/06 ,  H01L29/66 ,  H01L21/265 ,  H01L27/092 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786 ,  H01L21/8238

摘要： A method of making a nanowire device includes disposing a first nanowire stack over a substrate, the first nanowire stack including alternating layers of a first and second semiconducting material, the first semiconducting material contacting the substrate and the second semiconducting material being an exposed surface; disposing a second nanowire stack over the substrate, the second nanowire stack including alternating layers of the first and second semiconducting materials, the first semiconducting material contacting the substrate and the second semiconducting material being an exposed surface; forming a first gate spacer along a sidewall of a first gate region on the first nanowire stack and a second gate spacer along a sidewall of a second gate region on the second nanowire stack; oxidizing a portion of the first nanowire stack within the first gate spacer; and removing the first semiconducting material from the first nanowire stack and the second nanowire stack.

公开(公告)号：US09966430B2

公开(公告)日：2018-05-08

申请号：US15202983

申请日：2016-07-06

申请人： International Business Machines Corporation ,  GlobalFoundries, Inc.

发明人： Kangguo Cheng ,  Xin Miao ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： H01L29/06 ,  H01L21/8238 ,  H01L21/84 ,  H01L21/265 ,  H01L21/02 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786 ,  H01L29/423 ,  H01L27/092 ,  H01L27/12

CPC分类号： H01L29/0673 ,  B82Y10/00 ,  H01L21/02236 ,  H01L21/02238 ,  H01L21/02252 ,  H01L21/02532 ,  H01L21/02603 ,  H01L21/26566 ,  H01L21/823807 ,  H01L21/84 ,  H01L27/092 ,  H01L27/0922 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66742 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78654 ,  H01L29/78684 ,  H01L29/78696

摘要： A method of making a nanowire device includes disposing a first nanowire stack over a substrate, the first nanowire stack including alternating layers of a first and second semiconducting material, the first semiconducting material contacting the substrate and the second semiconducting material being an exposed surface; disposing a second nanowire stack over the substrate, the second nanowire stack including alternating layers of the first and second semiconducting materials, the first semiconducting material contacting the substrate and the second semiconducting material being an exposed surface; forming a first gate spacer along a sidewall of a first gate region on the first nanowire stack and a second gate spacer along a sidewall of a second gate region on the second nanowire stack; oxidizing a portion of the first nanowire stack within the first gate spacer; and removing the first semiconducting material from the first nanowire stack and the second nanowire stack.

公开(公告)号：US20170141198A1

公开(公告)日：2017-05-18

申请号：US15283951

申请日：2016-10-03

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GlobalFoundries, Inc.

发明人： Kangguo Cheng ,  Xin Miao ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： H01L29/417 ,  H01L29/16 ,  H01L21/762 ,  H01L29/66 ,  H01L29/423 ,  H01L29/06 ,  H01L29/08 ,  H01L29/78

CPC分类号： H01L29/41791 ,  H01L21/76224 ,  H01L21/76805 ,  H01L21/76816 ,  H01L21/76895 ,  H01L21/76897 ,  H01L21/823821 ,  H01L21/823842 ,  H01L21/823871 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5283 ,  H01L23/53209 ,  H01L23/535 ,  H01L27/0922 ,  H01L27/0924 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/16 ,  H01L29/41758 ,  H01L29/42356 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7851

摘要： A semiconductor device includes a source and drain on a substrate; a first and second gate on the source, and the second gate and a third gate on the drain; a source contact over the source and between the first and second gates, the source contact including first and second portions, the first portion in contact with the source and extending between the first and second gates, and the second portion contacting the first portion and extending over the first and second gates; and a drain contact formed over the drain and between the second and third gates, the drain contact including first and second portions, the first portion contacting the drain, extending between second and third gates, and recessed with respect to the first portion of the source contact, and the second portion in contact with the first portion and extending between and over the second and third gates.

公开(公告)号：US10749038B2

公开(公告)日：2020-08-18

申请号：US16057579

申请日：2018-08-07

申请人： International Business Machines Corporation ,  Globalfoundries Inc.

发明人： Kangguo Cheng ,  Xin Miao ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： H01L29/786 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66

摘要： In one aspect, a method of forming a semiconductor device includes the steps of: forming an alternating series of sacrificial/active layers on a wafer and patterning it into at least one nano device stack; forming a dummy gate on the nano device stack; patterning at least one upper active layer in the nano device stack to remove all but a portion of the at least one upper active layer beneath the dummy gate; forming spacers on opposite sides of the dummy gate covering the at least one upper active layer that has been patterned; forming source and drain regions on opposite sides of the nano device stack, wherein the at least one upper active layer is separated from the source and drain regions by the spacers; and replacing the dummy gate with a replacement gate. A masking process is also provided to tailor the effective device width of select devices.

公开(公告)号：US20170084690A1

公开(公告)日：2017-03-23

申请号：US15202983

申请日：2016-07-06

申请人： International Business Machines Corporation ,  GlobalFoundries, Inc.

发明人： Kangguo Cheng ,  Xin Miao ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： H01L29/06 ,  H01L29/66 ,  H01L29/423 ,  H01L21/02

CPC分类号： H01L29/0673 ,  B82Y10/00 ,  H01L21/02236 ,  H01L21/02238 ,  H01L21/02252 ,  H01L21/02532 ,  H01L21/02603 ,  H01L21/26566 ,  H01L21/823807 ,  H01L21/84 ,  H01L27/092 ,  H01L27/0922 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66742 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78654 ,  H01L29/78684 ,  H01L29/78696

摘要： A method of making a nanowire device incudes disposing a first nanowire stack over a substrate, the first nanowire stack including alternating layers of a first and second semiconducting material, the first semiconducting material contacting the substrate and the second semiconducting material being an exposed surface; disposing a second nanowire stack over the substrate, the second nanowire stack including alternating layers of the first and second semiconducting materials, the first semiconducting material contacting the substrate and the second semiconducting material being an exposed surface; forming a first gate spacer along a sidewall of a first gate region on the first nanowire stack and a second gate spacer along a sidewall of a second gate region on the second nanowire stack; oxidizing a portion of the first nanowire stack within the first gate spacer; and removing the first semiconducting material from the first nanowire stack and the second nanowire stack.

公开(公告)号：US09484306B1

公开(公告)日：2016-11-01

申请号：US14943663

申请日：2015-11-17

申请人： International Business Machines Corporation ,  GlobalFoundries, Inc.

发明人： Kangguo Cheng ,  Xin Miao ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： H01L21/70 ,  H01L23/535 ,  H01L21/8238 ,  H01L21/768 ,  H01L27/092 ,  H01L23/528

CPC分类号： H01L29/41791 ,  H01L21/76224 ,  H01L21/76805 ,  H01L21/76816 ,  H01L21/76895 ,  H01L21/76897 ,  H01L21/823821 ,  H01L21/823842 ,  H01L21/823871 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5283 ,  H01L23/53209 ,  H01L23/535 ,  H01L27/0922 ,  H01L27/0924 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/16 ,  H01L29/41758 ,  H01L29/42356 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7851

摘要： A semiconductor device includes a source and drain on a substrate; a first and second gate on the source, and the second gate and a third gate on the drain; a source contact over the source and between the first and second gates, the source contact including first and second portions, the first portion in contact with the source and extending between the first and second gates, and the second portion contacting the first portion and extending over the first and second gates; and a drain contact formed over the drain and between the second and third gates, the drain contact including first and second portions, the first portion contacting the drain, extending between second and third gates, and recessed with respect to the first portion of the source contact, and the second portion in contact with the first portion and extending between and over the second and third gates.

公开(公告)号：US09466570B1

公开(公告)日：2016-10-11

申请号：US15149286

申请日：2016-05-09

申请人： International Business Machines Corporation ,  GlobalFoundries, Inc.

发明人： Kangguo Cheng ,  Xin Miao ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： H01L21/70 ,  H01L23/535 ,  H01L21/8238

CPC分类号： H01L29/41791 ,  H01L21/76224 ,  H01L21/76805 ,  H01L21/76816 ,  H01L21/76895 ,  H01L21/76897 ,  H01L21/823821 ,  H01L21/823842 ,  H01L21/823871 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5283 ,  H01L23/53209 ,  H01L23/535 ,  H01L27/0922 ,  H01L27/0924 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/16 ,  H01L29/41758 ,  H01L29/42356 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7851

摘要： A semiconductor device includes a source and drain on a substrate; a first and second gate on the source, and the second gate and a third gate on the drain; a source contact over the source and between the first and second gates, the source contact including first and second portions, the first portion in contact with the source and extending between the first and second gates, and the second portion contacting the first portion and extending over the first and second gates; and a drain contact formed over the drain and between the second and third gates, the drain contact including first and second portions, the first portion contacting the drain, extending between second and third gates, and recessed with respect to the first portion of the source contact, and the second portion in contact with the first portion and extending between and over the second and third gates.

摘要翻译： 半导体器件包括在衬底上的源极和漏极; 源极上的第一和第二栅极，以及漏极上的第二栅极和第三栅极; 在源极之间以及第一和第二栅极之间的源极接触，源极接触包括第一和第二部分，与源极接触并在第一和第二栅极之间延伸的第一部分，以及第二部分接触第一部分并延伸 在第一和第二个门口; 以及形成在所述漏极和所述第二和第三栅极之间的漏极接触，所述漏极接触包括第一和第二部分，所述第一部分接触所述漏极，在第二和第三栅极之间延伸并相对于所述源极的第一部分凹陷 接触，第二部分与第一部分接触并在第二和第三栅极之间和之上延伸。