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    METHODS FOR CMOS-MEMS INTEGRATED DEVICES WITH MULTIPLE SEALED CAVITIES MAINTAINED AT VARIOUS PRESSURES
    1.
    发明申请
    METHODS FOR CMOS-MEMS INTEGRATED DEVICES WITH MULTIPLE SEALED CAVITIES MAINTAINED AT VARIOUS PRESSURES 审中-公开

    公开(公告)号：US20200109045A1

    公开(公告)日：2020-04-09

    申请号：US16698535

    申请日：2019-11-27

    Applicant: INVENSENSE, INC.

    Inventor： Michael DANEMAN ,  Martin LIM ,  Kegang HUANG ,  Igor TCHERTKOV

    IPC: B81B7/02 ,  B81C1/00

    Abstract: A Microelectromechanical systems (MEMS) structure comprises a MEMS wafer. A MEMS wafer includes a handle wafer with cavities bonded to a device wafer through a dielectric layer disposed between the handle and device wafers. The MEMS wafer also includes a moveable portion of the device wafer suspended over a cavity in the handle wafer. Four methods are described to create two or more enclosures having multiple gas pressure or compositions on a single substrate including, each enclosure containing a moveable portion. The methods include: A. Forming a secondary sealed enclosure, B. Creating multiple ambient enclosures during wafer bonding, C. Creating and breaching an internal gas reservoir, and D. Forming and subsequently sealing a controlled leak/breach into the enclosure.

    INTERNAL ELECTRICAL CONTACT FOR ENCLOSED MEMS DEVICES
    2.
    发明申请
    INTERNAL ELECTRICAL CONTACT FOR ENCLOSED MEMS DEVICES 有权
    用于封装的MEMS器件的内部电气接点

    公开(公告)号：US20140349434A1

    公开(公告)日：2014-11-27

    申请号：US14456973

    申请日：2014-08-11

    Applicant: InvenSense, Inc.

    Inventor： Kegang HUANG ,  Jongwoo SHIN ,  Martin LIM ,  Michael Julian DANEMAN ,  Joseph SEEGER

    IPC: B81C1/00

    CPC classification number: B81C1/00301 ,  B81B7/0064 ,  B81B2207/098 ,  B81C1/00269 ,  B81C2203/0118 ,  B81C2203/019 ,  B81C2203/031

    Abstract: A method of fabricating electrical connections in an integrated MEMS device is disclosed. The method comprises forming a MEMS wafer. Forming a MEMS wafer includes forming one cavity in a first semiconductor layer, bonding the first semiconductor layer to a second semiconductor layer with a dielectric layer disposed between the first semiconductor layer and the second semiconductor layer, and etching at least one via through the second semiconductor layer and the dielectric layer and depositing a conductive material on the second semiconductor layer and filling the at least one via. Forming a MEMS wafer also includes patterning and etching the conductive material to form one standoff and depositing a germanium layer on the conductive material, patterning and etching the germanium layer, and patterning and etching the second semiconductor layer to define one MEMS structure. The method also includes bonding the MEMS wafer to a base substrate.

    Abstract translation: 公开了一种在集成MEMS器件中制造电连接的方法。 该方法包括形成MEMS晶片。 形成MEMS晶片包括在第一半导体层中形成一个空腔，将第一半导体层与设置在第一半导体层和第二半导体层之间的电介质层结合到第二半导体层，并且通过第二半导体蚀刻至少一个通孔 层和介电层，并在第二半导体层上沉积导电材料并填充至少一个通孔。 形成MEMS晶片还包括图案化和蚀刻导电材料以形成一个间隔并在导电材料上沉积锗层，图案化和蚀刻锗层，以及图案化和蚀刻第二半导体层以限定一个MEMS结构。 该方法还包括将MEMS晶片接合到基底基板。

    SURFACE ROUGHENING TO REDUCE ADHESION IN AN INTEGRATED MEMS DEVICE
    3.
    发明申请
    SURFACE ROUGHENING TO REDUCE ADHESION IN AN INTEGRATED MEMS DEVICE 审中-公开
    表面粗糙化以减少集成MEMS器件中的粘合

    公开(公告)号：US20140264655A1

    公开(公告)日：2014-09-18

    申请号：US14061152

    申请日：2013-10-23

    Applicant: InvenSense, Inc.

    Inventor： Kirt Reed WILLIAMS ,  Kegang HUANG ,  Wencheng XU ,  Jongwoo SHIN ,  Martin LIM

    IPC: B81B3/00 ,  B81C1/00

    CPC classification number: B81B3/001 ,  B81C2201/115

    Abstract: In an integrated MEMS device, moving silicon parts with smooth surfaces can stick together if they come into contact. By roughening at least one smooth surface, the effective area of contact, and therefore surface adhesion energy, is reduced and hence the sticking force is reduced. The roughening of a surface can be provided by etching the smooth surfaces in gas, plasma, or liquid with locally non-uniform etch rate. Various etch chemistries and conditions lead to various surface roughness.

    Abstract translation: 在集成的MEMS器件中，移动具有光滑表面的硅部件如果接触则可以粘在一起。 通过使至少一个光滑表面粗糙化，有效的接触面积以及因此的表面附着能减少，因此粘附力降低。 可以通过以局部不均匀蚀刻速率蚀刻气体，等离子体或液体中的光滑表面来提供表面的粗糙化。 各种蚀刻化学和条件导致各种表面粗糙度。

    INTERNAL ELECTRICAL CONTACT FOR ENCLOSED MEMS DEVICES
    5.
    发明申请
    INTERNAL ELECTRICAL CONTACT FOR ENCLOSED MEMS DEVICES 有权
    用于封装的MEMS器件的内部电气接点

    公开(公告)号：US20150336792A1

    公开(公告)日：2015-11-26

    申请号：US14590839

    申请日：2015-01-06

    Applicant: InvenSense, Inc.

    Inventor： Kegang HUANG ,  Jongwoo SHIN ,  Martin LIM ,  Michael Julian DANEMAN ,  Joseph SEEGER

    IPC: B81B7/00

    CPC classification number: B81C1/00301 ,  B81B7/0064 ,  B81B2207/098 ,  B81C1/00269 ,  B81C2203/0118 ,  B81C2203/019 ,  B81C2203/031

    Abstract: A method of fabricating electrical connections in an integrated MEMS device is disclosed. The method comprises forming a MEMS wafer. Forming a MEMS wafer includes forming one cavity in a first semiconductor layer, bonding the first semiconductor layer to a second semiconductor layer with a dielectric layer disposed between the first semiconductor layer and the second semiconductor layer, and etching at least one via through the second semiconductor layer and the dielectric layer and depositing a conductive material on the second semiconductor layer and filling the at least one via. Forming a MEMS wafer also includes patterning and etching the conductive material to form one standoff and depositing a germanium layer on the conductive material, patterning and etching the germanium layer, and patterning and etching the second semiconductor layer to define one MEMS structure. The method also includes bonding the MEMS wafer to a base substrate.

    Abstract translation: 公开了一种在集成MEMS器件中制造电连接的方法。 该方法包括形成MEMS晶片。 形成MEMS晶片包括在第一半导体层中形成一个空腔，将第一半导体层与设置在第一半导体层和第二半导体层之间的电介质层结合到第二半导体层，并且通过第二半导体蚀刻至少一个通孔 层和介电层，并在第二半导体层上沉积导电材料并填充至少一个通孔。 形成MEMS晶片还包括图案化和蚀刻导电材料以形成一个间隔并在导电材料上沉积锗层，图案化和蚀刻锗层，以及图案化和蚀刻第二半导体层以限定一个MEMS结构。 该方法还包括将MEMS晶片接合到基底基板。

    INTERNAL ELECTRICAL CONTACT FOR ENCLOSED MEMS DEVICES
    6.
    发明申请
    INTERNAL ELECTRICAL CONTACT FOR ENCLOSED MEMS DEVICES 有权

    公开(公告)号：US20140213007A1

    公开(公告)日：2014-07-31

    申请号：US14033366

    申请日：2013-09-20

    Applicant: InvenSense, Inc.

    Inventor： Kegang HUANG ,  Jongwoo SHIN ,  Martin LIM ,  Michael Julian DANEMAN ,  Joseph SEEGER

    IPC: B81C1/00

    CPC classification number: B81C1/00301 ,  B81B7/0064 ,  B81B2207/098 ,  B81C1/00269 ,  B81C2203/0118 ,  B81C2203/019 ,  B81C2203/031

    Abstract: A method of fabricating electrical connections in an integrated MEMS device is disclosed. The method comprises forming a MEMS wafer. Forming a MEMS wafer includes forming one cavity in a first semiconductor layer, bonding the first semiconductor layer to a second semiconductor layer with a dielectric layer disposed between the first semiconductor layer and the second semiconductor layer, and etching at least one via through the second semiconductor layer and the dielectric layer and depositing a conductive material on the second semiconductor layer and filling the at least one via. Forming a MEMS wafer also includes patterning and etching the conductive material to form one standoff and depositing a germanium layer on the conductive material, patterning and etching the germanium layer, and patterning and etching the second semiconductor layer to define one MEMS structure. The method also includes bonding the MEMS wafer to a base substrate.

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